CP2109-A01-GM View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
CP2109-A01-GM Datasheet PDF : 26 Pages
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CP2102/9
4. Pinout and Package Definitions
Table 9. CP2102/9 Pin Definitions
Name
VDD
Pin #
6
Type
Description
Power In 3.0–3.6 V Power Supply Voltage Input.
GND
RST
REGIN
VBUS
NC1 /
Power Out 3.3 V Voltage Regulator Output.
See "10. Voltage Regulator" on page 19.
3
Ground
9
D I/O Device Reset. Open-drain output of internal POR or VDD monitor. An
external source can initiate a system reset by driving this pin low for
at least 15 µs.
7
Power In 5 V Regulator Input. This pin is the input to the on-chip voltage regu-
lator.
8
D In VBUS Sense Input. This pin should be connected to the VBUS signal
of a USB network. A 5 V signal on this pin indicates a USB network
connection.
This pin should be left unconnected or tied to VDD. This pin is unused
on the CP2102 and may be connected to the Vpp programming
18
capacitor to maintain board compatibility with the CP2109.
VPP2
D+
A Power VPP Programming Supply Voltage
4
D I/O USB D+
D–
5
D I/O USB D–
TXD
26
D Out Asynchronous data output (UART Transmit)
RXD
25
D In Asynchronous data input (UART Receive)
CTS
RTS
DSR
DTR
233
D In Clear To Send control input (active low)
243
D Out Ready to Send control output (active low)
273
D in Data Set Ready control input (active low)
283
D Out Data Terminal Ready control output (active low)
DCD
13
RI
23
SUSPEND
123
D In
D In
D Out
Data Carrier Detect control input (active low)
Ring Indicator control input (active low)
This pin is driven high when the CP2102/9 enters the USB suspend
state.
SUSPEND
113
D Out
This pin is driven low when the CP2102/9 enters the USB suspend
state.
NC
10, 13–22
These pins should be left unconnected or tied to VDD.
Notes:
1. For CP2102, pin is no connect (NC).
2. For CP2109, pin is VPP. VPP can be left unconnected when not used for in-application programming.
3. Pins can be left unconnected when not used.
Rev. 1.8
11
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