TDA8932T/N1112 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

TDA8932T/N1112

Class-D audio amplifier

NXP Semiconductors. 

NXP Semiconductors

TDA8932

Class-D audio amplifier

8. Functional description

8.1 General

The TDA8932 is a mono full-bridge or stereo half-bridge audio power amplifier using

class-D technology. The audio input signal is converted into a Pulse Width Modulated

(PWM) signal via an analog input stage and PWM modulator. To enable the output power

Diffusion Metal Oxide Semiconductor (DMOS) transistors to be driven, this digital PWM

signal is applied to a control and handshake block and driver circuits for both the high side

and low side. A 2nd-order low-pass filter converts the PWM signal to an analog audio

signal across the loudspeakers.

The TDA8932 contains two independent half-bridges with full differential input stages. The

loudspeakers can be connected in the following configurations:

• Mono full-bridge: Bridge Tied Load (BTL)

• Stereo half-bridge: Single-Ended (SE)

The TDA8932 contains common circuits to both channels such as the oscillator, all

reference sources, the mode functionality and a digital timing manager. The following

protections are built-in: thermal foldback, temperature, current and voltage protections.

8.2 Mode selection and interfacing

The TDA8932 can be switched in three operating modes using pins POWERUP and

ENGAGE:

• Sleep mode: with low supply current.

• Mute mode: the amplifiers are switching idle (50 % duty cycle), but the audio signal at

the output is suppressed by disabling the Vl-converter input stages. The capacitors on

pins HVP1 and HVP2 have been charged to half the supply voltage (asymmetrical

supply only).

• Operating mode: the amplifiers are fully operational with output signal.

• Fault mode.

Both pins POWERUP and ENGAGE refer to pin CGND.

Table 4 shows the different modes as a function of the voltages on the POWERUP and

ENGAGE pins.

Table 4. Mode selection

Mode

Pin

POWERUP

Sleep

< 0.8 V

Mute

2 V to 6.0 V[1]

Operating 2 V to 6.0 V[1]

Fault

2 V to 6.0 V[1]

ENGAGE

< 0.8 V

< 0.8 V[1]

3 V to 6.0 V[1]

don’t care

DIAG

don’t care

>2V

>2V

< 0.8 V

[1] In case of symmetrical supply conditions the voltage applied to pins POWERUP and ENGAGE must never

exceed the supply voltage (VDDA, VDDP1 or VDDP2).

TDA8932_2

Preliminary data sheet

Rev. 02 — 12 December 2006

© NXP B.V. 2006. All rights reserved.

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