25VF080 View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

Manufacturer

25VF080

8 Mbit SPI Serial Flash

Silicon Storage Technology 

8 Mbit SPI Serial Flash

SST25VF080

Read

The Read instruction supports up to 20 MHz, it outputs the

data starting from the specified address location. The data

output stream is continuous through all addresses until ter-

minated by a low to high transition on CE#. The internal

address pointer will automatically increment until the high-

est memory address is reached. Once the highest memory

address is reached, the address pointer will automatically

increment to the beginning (wrap-around) of the address

Advance Information

space, i.e. for 8 Mbit density, once the data from address

location 0FFFFFH had been read, the next output will be

from address location 000000H.

The Read instruction is initiated by executing an 8-bit com-

mand, 03H, followed by address bits [A23-A0]. CE# must

remain active low for the duration of the Read cycle. See

Figure 4 for the Read sequence.

CE#

MODE 3

SCK MODE 0

0 1 2345 6 78

15 16

23 24 31 32 39 40 47 48 55 56

63 64 70

SI

03

MSB

ADD.

MSB

ADD.

HIGH IMPEDANCE

SO

FIGURE 4: READ SEQUENCE

ADD.

N

DOUT

MSB

N+1

DOUT

N+2

DOUT

N+3

DOUT

N+4

DOUT

1250 F04.0

©2003 Silicon Storage Technology, Inc.

9

S71250-00-000

10/03

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