FS6232-01 View Datasheet(PDF) - AMI Semiconductor

Part Name

Description

Manufacturer

FS6232-01

Two-Way MP Motherboard Clock Generator IC

AMI Semiconductor 

AMERICAN MICROSYSTEMS, INC.

FS6232-01

Two-Way MP Motherboard Clock Generator IC

September 2000

2.0 Programming Information

Table 4: Function/Clock Enable Configuration

PWR_

DWN#

1

1

1

1

1

1

1

1

0

CONTROL INPUTS

SEL

133/100#

SEL_A

0

0

0

0

0

1

0

1

1

0

1

0

1

1

1

1

X

X

SEL_B

0

1

0

1

0

1

0

1

X

HOST_P

1:4

100.00

reserved

reserved

tristate

133.33

reserved

reserved

XIN ÷ 2

2 × IREF

HOST_N

1:4

100.00

reserved

reserved

tristate

133.33

reserved

reserved

XIN ÷ 2

tristate

CLOCK OUTPUTS (MHz)

MREF_P,

MREF_N

CK66_

0:3

PCI_

0:9

50.00

reserved

reserved

tristate

66.67

reserved

reserved

XIN ÷ 4

66.67

reserved

reserved

tristate

66.67

reserved

reserved

XIN ÷ 4

33.33

reserved

reserved

tristate

33.33

reserved

reserved

XIN ÷ 8

low

low

low

CK48_

0:1

48.008

reserved

reserved

tristate

48.008

reserved

reserved

XIN ÷ 2

low

REF

14.318

reserved

reserved

tristate

14.318

reserved

reserved

XIN

low

Table 5: Synthesis Error

CLOCK

TARGET

(MHz)

ACTUAL

(MHz)

DEVIATION

(ppm)

HOST_P1:4,

HOST_N1:4

100.0000

133.3333

99.9963

133.3072

-36.657

-195.924

MREF_P,

MREF_N

50.0000

66.6667

49.9982

66.6536

-36.657

-195.924

CK66

66.6667

66.6642

-36.657

PCI

33.3333

33.3321

-36.657

CK48 (1)

48.000

48.008

+167

1. 48MHz USB clock is required to be +167ppm off from 48.000MHz to conform to USB

standards.

2. Spread spectrum is disabled

3.0 HOST Buffer Current Control

The current supplied at the HOST outputs is controlled by

two parameters:

1) the value of the programming resistor from the IREF

pin to ground (VSS), and

2) the multiplier factor determined by the logic setting of

the ISEL_0 and ISEL_1 pins.

3.1 Current Reference

The HOST output current is a mirrored and scaled copy

of the reference current flowing through the programming

resistor on the IREF pin. Conceptually, the circuit given in

Figure 2 shows how the mirror current is generated.

The voltage that appears at the IREF pin is one-third of

the voltage at the VDD_I pin. The reference current is

 1 × VDD_I

I REF =  3 RIREF

.

3.2 Current Scaling

The mirrored reference current can be increased by

adding one or more copies of the mirror current together.

The additional current is controlled by the logic settings

on the ISEL_0 and ISEL_1 pins.

Table 6: Current Multiplier

ISEL_0

0

0

1

1

ISEL_1

0

1

0

1

MULTPLIER

IO = 5 × IREF

IO = 6 × IREF

IO = 4 × IREF

IO = 7 × IREF

ISO9001

3

9.18.00

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