FDC37C669 View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37C669

PC 98/99 Compliant Super I/O Floppy Disk Controller with Infrared Support

SMSC -> Microchip 

DESCRIPTION OF PIN FUNCTIONS

QFP/

TQFP

PIN NO.

NAME

SYMBOL

BUFFER

TYPE

DESCRIPTION

80,90 nData Set Ready nDSR1

nDSR2

I

Active low Data Set Ready inputs for the serial

port. Handshake signal which notifies the

UART that the modem is ready to establish

the communication link. The CPU can

monitor the status of nDSR signal by reading

bit 5 of Modem Status Register (MSR). A

nDSR signal state change from low to high

after the last MSR read will set MSR bit 1 to a

1. If bit 3 of Interrupt Enable Register is set,

the interrupt is generated when nDSR

changes state. Note: Bit 5 of MSR is the

complement of nDSR.

85,87 nData Carrier

Detect

nDCD1

nDCD2

I

Active low Data Carrier Detect inputs for the

serial port. Handshake signal which notifies

the UART that carrier signal is detected by the

modem. The CPU can monitor the status of

nDCD signal by reading bit 7 of Modem Status

Register (MSR). A nDCD signal state change

from low to high after the last MSR read will

set MSR bit 3 to a 1. If bit 3 of Interrupt

Enable Register is set, the interrupt is

generated when nDCD changes state. Note:

Bit 7 of MSR is the complement of nDCD.

84,86 nRing Indicator nRI1

nRI2

I

Active low Ring Indicator inputs for the serial

port. Handshake signal which notifies the

UART that the telephone ring signal is

detected by the modem. The CPU can

monitor the status of nRI signal by reading bit

6 of Modem Status Register (MSR). A nRI

signal state change from low to high after the

last MSR read will set MSR bit 2 to a 1. If bit 3

of Interrupt Enable Register is set, the

interrupt is generated when nRI changes

state. Note: Bit 6 of MSR is the complement

of nRI.

PARALLEL PORT INTERFACE

10

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