SSD1811 View Datasheet(PDF) - Solomon Systech

Part Name

Description

Manufacturer

SSD1811

LCD Segment / Common Driver with Controller

Solomon Systech  

PIN DESCRIPTIONS

MSTAT

This pin is the static indicator driving output. It is only active

in master operation. The frame signal output pin, M, should be

used as the back plane signal for the static indicator.

The duration of overlapping could be programmable. See

Extended Command Table for details.

This pin becomes high impedance if the chip is operating in

slave mode.

M

This pin is the frame signal input/output. In master mode,

the pin supplies frame signal to slave devices while in slave

mode, the pin receives frame signal from the master device.

CL

This pin is the display clock input/output. In master mode

with internal oscillator enabled (CLS pin pulled high), this pin

supplies display clock signal to slave devices.

In slave mode or when internal oscillator is disabled, the pin

receives display clock signal from the master device or external

clock source.

DOF

This pin is display blanking control between master and

slave devices. In master mode, this pin supplies on/off signal to

slave devices. In slave mode, this pin receives on/off signal from

the master device.

CS1, CS2

These pins are the chip select inputs. The chip is enabled

for MCU communication only when both CS1 is pulled low and

CS2 is pulled high.

RES

This pin is reset signal input. Initialization of the chip is start-

ed once this pin is pulled low. Minimum pulse width for complet-

ing the reset procedure is 1us.

D/C

This pin is Data/Command control pin. When the pin is

pulled high, the data at D7-D0 is treated as display data. When

the pin is pulled low, the data at D7-D0 will be transferred to the

command register. Details relationship with other MCU interface

signals, please refer to the Timing Characteristics Diagrams.

R/W(WR)

This pin is MCU interface input. When interfacing to an

6800-series microprocessor, this pin will be used as Read/Write

(R/W) selection input. Read mode will be carried out when this

pin is pulled high and write mode when low.

When interfacing to an 8080-microprocessor, this pin will be

the Write (WR) input. Data write operation is initiated when this

pin is pulled low when the chip is selected.

E(RD)

This pin is MCU interface input. When interfacing to an

6800-series microprocessor, this pin will be used as the Enable

(E) signal. Read/write operation is initiated when this pin is

pulled high when the chip is selected.

When connecting to an 8080-microprocessor, this pin re-

ceives the Read (RD) signal. Data read operation is initiated

when this pin is pulled low when the chip is selected.

D7-D0

These pins are the 8-bit bi-directional data bus to be con-

nected to the MCU in parallel interface mode. D7 is the MSB

while D0 is the LSB.

When serial mode is selected, D7 is the serial data input

(SDA) and D6 is the serial clock input (SCK).

VDD

Chip’s Power Supply pin. This is also the reference for the

DC-DC Converter output and LCD driving voltages.

VSS

Ground. A reference for the logic pins.

VSS1

Input for internal DC-DC converter. The voltage of generat-

ed, VEE, equals to the multiple factor times the potential different

between this pin, VSS1, and VDD. The multiple factor, 2X, 3X or

4X, is selected by different connections of the external capaci-

tors. All voltage levels are referenced to VDD .

Note: the potential at this input pin must lower than or equal

to VSS.

VEE

This is the most negative voltage supply pin of the chip. It

can be supplied externally or generated by the internal DC-DC

converter, by turning on the internal voltage booster option in

the Set Power Control Register command.

When using internal DC-DC converter as generator, voltage

at this pin is for internal reference only. It CANNOT be used for

driving external circuitries.

C3N, C1P, C1N, C2N and C2P

When internal DC-DC voltage converter is used, external

capacitor(s) is/are connected between these pins. Different con-

nection will result in different DC-DC converter multiple factor,

2X, 3X or 4X. Detail connections please refer to voltage convert-

er section in the functional block description.

VFS

This is an input pin to provide an external voltage reference

for the internal voltage regulator. The function of this pin is only

enabled for the External Input chip models which are required

special ordering. For normal chip model, please leave this pin

NC (No connection).

SOLOMON

Rev 3.1

08/2001

SSD181X Series

8

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