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PIC16F872-I/SS View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16F872-I/SS
Microchip
Microchip Technology Microchip
PIC16F872-I/SS Datasheet PDF : 160 Pages
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PIC16F872
2.2.2.6 PIE2 REGISTER
The PIE2 register contains the individual enable bits for
the SSP bus collision interrupt and the EEPROM write
operation interrupt.
REGISTER 2-6: PIE2 REGISTER (ADDRESS 8Dh)
U-0 R/W-0 U-0 R/W-0 R/W-0 U-0
U-0 R/W-0
EEIE BCLIE
bit7
R = Readable bit
bit0 W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n= Value at POR reset
bit 7: Unimplemented: Read as '0'
bit 6: Reserved: Always maintain this bit clear
bit 5: Unimplemented: Read as '0'
bit 4:
EEIE: EEPROM Write Operation Interrupt Enable
1 = Enable EE Write Interrupt
0 = Disable EE Write Interrupt
bit 3:
BCLIE: Bus Collision Interrupt Enable
1 = Enable Bus Collision Interrupt
0 = Disable Bus Collision Interrupt
bit 2-1: Unimplemented: Read as '0'
bit 0: Reserved: Always maintain this bit clear
© 1999 Microchip Technology Inc.
Preliminary
DS30221A-page 17

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