74LVC74ABQ View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

74LVC74ABQ

Dual D-type flip-flop with set and reset; positive-edge trigger

NXP Semiconductors. 

74LVC74A

Dual D-type flip-flop with set and reset; positive-edge trigger

Rev. 06 — 4 June 2007

Product data sheet

1. General description

The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (D) inputs,

clock (CP) inputs, set (SD) and (RD) inputs, and complementary Q and Q outputs.

The set and reset are asynchronous active LOW inputs and operate independently of the

clock input. Information on the data input is transferred to the Q output on the

LOW-to-HIGH transition of the clock pulse. The D inputs must be stable one set-up time

prior to the LOW-to-HIGH clock transition, for predictable operation.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and

fall times.

2. Features

I 5 V tolerant inputs for interlacing with 5 V logic

I Wide supply voltage range from 1.2 V to 3.6 V

I CMOS low power consumption

I Direct interface with TTL levels

I Complies with JEDEC standard JESD8-B/JESD36

I ESD protection:

N HBM JESD22-A114D exceeds 2000 V

N CDM JESD22-C101C exceeds 1000 V

I Specified from −40 °C to +85 °C and −40 °C to 125 °C

3. Ordering information

Table 1. Ordering information

Type number Package

Temperature range Name

Description

Version

74LVC74AD −40 °C to +125 °C SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74LVC74ADB −40 °C to +125 °C SSOP14

plastic shrink small outline package; 14 leads;

body width 5.3 mm

SOT337-1

74LVC74APW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74LVC74ABQ −40 °C to +125 °C

DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762-1

quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

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