AT26DF041-MU View Datasheet(PDF) - Atmel Corporation
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AT26DF041-MU Datasheet PDF : 20 Pages
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AT26DF041
7. Pin Descriptions
7.1 Serial Input (SI)
The SI pin is an input-only pin and is used to shift data into the device. The SI pin is used for all
data input including opcodes and address sequences.
7.2 Serial Output (SO)
The SO pin is an output-only pin and is used to shift data out from the device.
7.3 Serial Clock (SCK)
The SCK pin is an input-only pin and is used to control the flow of data to and from the
DataFlash. Data is always clocked into the device on the rising edge of SCK and clocked out
of the device on the falling edge of SCK.
7.4 Chip Select (CS)
The DataFlash is selected when the CS pin is low. When the device is not selected, data will
not be accepted on the SI pin, and the SO pin will remain in a high-impedance state. A high-to-
low transition on the CS pin is required to start an operation, and a low-to-high transition on
the CS pin is required to end an operation.
7.5 Write Protect (WP)
If the WP pin is held low, the top 256 pages (64K-bytes of address locations 07FFFFh to
070000h) of the main memory cannot be reprogrammed. The only way to reprogram the top
256 pages is to first drive the protect pin high and then use the program commands previously
mentioned. If this pin and feature are not utilized it is recommended that the WP pin be driven
high externally.
8. Power-on/Reset State
When power is first applied to the device, or when recovering from a reset condition, the
device will default to SPI Mode 3. In addition, the SO pin will be in a high-impedance state, and
a high-to-low transition on the CS pin will be required to start a valid instruction. The SPI mode
will be automatically selected on every falling edge of CS by sampling the inactive clock state.
After power is applied and VCC is at the minimum datasheet value, the system should wait 20
ms before an operational mode is started.
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3495B–DFLSH–8/05
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