DM9324 View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

Manufacturer

DM9324

5-Bit Comparator

Fairchild Semiconductor 

Functional Description

The ’24 5-bit comparators use combinational circuitry to

directly generate “A greater than B” and “A less than B”

outputs. As evident from the logic diagram, these outputs

are generated in only three gate delays. The “A equals B”

output is generated in one additional gate delay by decod-

ing the “A neither less than nor greater than B” condition

with a NOR gate. All three outputs are activated by the

active LOW Enable Input (E).

Tying the A > B output from one device into an A input on

another device and the A < B output into the corresponding

B input permits easy expansion.

The A4 and B4 inputs are the most significant inputs and

A0, B0 the least significant. Thus if A4 is HIGH and B4 is

LOW, the A > B output will be HIGH regardless of all other

inputs except E.

Logic Diagram

www.fairchildsemi.com

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