DS1338(2004) View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
DS1338 Datasheet PDF : 15 Pages
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DS1338 I2C RTC with 56-Byte NV RAM
Control Register (07h)
The control register controls the operation of the SQW/OUT pin and provides oscillator status.
BIT 7
OUT
BIT 6
0
BIT 5
OSF
BIT 4
SQWE
BIT 3
0
BIT 2
0
BIT 1
RS1
BIT 0
RS0
Bit 7: Output Control (OUT). Controls the output level of the SQW/OUT pin when the square-wave output is
disabled. If SQWE = 0, the logic level on the SQW/OUT pin is 1 if OUT = 1; it is 0 if OUT = 0.
Bit 5: Oscillator Stop Flag (OSF). A logic 1 in this bit indicates that the oscillator has stopped or was stopped for
some time period and can be used to judge the validity of the clock and calendar data. This bit is edge triggered,
and is set to logic 1 when the internal circuitry senses the oscillator has transitioned from a normal run state to a
STOP condition. The following are examples of conditions that may cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on VCC and VBAT are insufficient to support oscillation.
3) The CH bit is set to 1, disabling the oscillator.
4) External influences on the crystal (i.e., noise, leakage, etc.).
This bit remains at logic 1 until written to logic 0. This bit can only be written to logic 0. Attempting to write OSF to
logic 1 leaves the value unchanged.
Bit 4: Square-Wave Enable (SQWE). When set to logic 1, this bit enables the oscillator output to operate with
either VCC or VBAT applied. The frequency of the square-wave output depends upon the value of the RS0 and RS1
bits.
Bits 1 and 0: Rate Select (RS1 and RS0). These bits control the frequency of the square-wave output when the
square-wave output has been enabled. The table below lists the square-wave frequencies that can be selected
with the RS bits.
Square-Wave Output Frequency
RS1 RS0
0
0
0
1
1
0
1
1
SQW OUTPUT
FREQUENCY
1Hz
4.096kHz
8.192kHz
32.768kHz
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