Figure 7 illustrates how to connect a 20 ns static RAM with a 33
MHz. DSP56001. The important parameters are TDW < 10 ns,
TDOE < 10 ns, and TAA = 20 ns maximum. A 7.5 ns PLD is used
to minimize decoding delays. This example maps the static RAM
into the ranges X:$1000-1FFF and Y:$1000-1FFF. The PLD
equation is:
RAM_ENABLE = PS & !DS & !A15 & !A14 & !A13 & !A12
DSP56001
27 MHZ
DATA
ADDRESS
DS
PS
RD
WR
16L8-7
7.5ns PLD
4
5
A12
6 A13
7 A14
A15
8
DS
9 PS
RAM_ENABLE
12
MCM6264D
(8K X 8) 20 ns
DATA
ADDRESS
E
OE
WR
CS
Figure B-7. 27 MHz DSP56001 with 20 ns SRAM
DSP56001
MOTOROLA
B-51