DSP56001 View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
DSP56001 Datasheet PDF : 64 Pages
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DSP56001 Electrical Characteristics
Power Considerations
The average chip-junction temperature, TJ, in °C can be obtained from:
TJ = TA + (PD × ΘJA)
(1)
Where:
TA = Ambient Temperature, °C
ΘJA = Package Thermal Resistance, Junction-to-Ambient, °C/W
PD = PINT + PI/O
PINT = ICC × Vcc, Watts - Chip Internal Power
PI/O = Power Dissipation on Input and Output Pins - User Determined
For most applications PI/O << PINT and can be neglected; however, PI/O + PINT must not exceed Pd. An appropriate relationship
between PD and TJ (if PI/O is neglected) is:
PD = K/(TJ + 273° C)
(2)
Solving equations (1) and (2) for K gives:
K = PD × (TA + 273° C) + ΘJA × PD2
(3)
Where K is a constant pertaining to the particular part. K can be determined from equation (2) by measuring PD (at equilibrium) for a
known TA. Using this value of K, the values of PD and TJ can be obtained by solving equations (1) and (2) iteratively for any value of
TA. The total thermal resistance of a package (ΘJA) can be separated into two components, ΘJC and CA, representing the barrier to
heat flow from the semiconductor junction to the package (case) surface (ΘJC) and from the case to the outside ambient (CA). These
terms are related by the equation:
ΘJA = ΘJC + CA
(4)
ΘJC is device related and cannot be influenced by the user. However, CA is user dependent and can be minimized by such thermal
management techniques as heat sinks, ambient air cooling, and thermal convection. Thus, good thermal management on the part of
the user can significantly reduce CA so that ΘJA approximately equals ΘJC. Substitution of ΘJC for ΘJA in equation (1) will result in a
lower semiconductor junction temperature. Values for thermal resistance presented in this document, unless estimated, were derived
using the procedure described in Motorola Reliability Report 7843, “Thermal Resistance Measurement Method for MC68XX
Microcomponent Devices”, and are provided for design purposes only. Thermal measurements are complex and dependent on
procedure and setup. User-derived values for thermal resistance may differ.
Layout Practices
Each Vcc pin on the DSP56001 should be provided with a low-impedance path to + 5 volts. Each GND pin should likewise be provided
with a low-impedance path to ground. The power supply pins drive four distinct groups of logic on chip. They are:
Vcc
G12,C6
L8
G3
C9
GND
Function
G11,B7
Internal Logic supply pins
L6,L9
Address bus output buffer supply pins
D3,J3
Data bus output buffer supply pins
E11
Port B and C output buffer supply pins
Power and Ground Connections for PGA
Vcc
GND
Function
35, 36, 128, 129 33, 34, 130, 131 Internal Logic supply pins
63, 64
55, 56, 73, 74
Address bus output buffer supply pins
100, 101
90, 91, 111, 112 Data bus output buffer supply pins
12, 13
23, 24
Port B and C output buffer supply pins
Power and Ground Connections for CQFP and PQFP
MOTOROLA
6
DSP56001
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