FDC37N869 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37N869
SMSC -> Microchip
FDC37N869 Datasheet PDF : 147 Pages
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Configure.................................................................................................................................. 54
Version ..................................................................................................................................... 55
Relative Seek ............................................................................................................................. 55
Perpendicular Mode.................................................................................................................. 56
LOCK........................................................................................................................................ 57
ENHANCED DUMPREG ............................................................................................................. 57
COMPATIBILITY ............................................................................................................................ 57
PARALLEL PORT FLOPPY DISK CONTROLLER.......................................................................................... 57
SERIAL PORT (UART) ...................................................................................................................... 59
REGISTER DESCRIPTION...................................................................................................................... 59
RECEIVE BUFFER REGISTER (RB)............................................................................................ 59
TRANSMIT BUFFER REGISTER (TB) ......................................................................................... 59
INTERRUPT ENABLE REGISTER (IER)....................................................................................... 59
INTERRUPT IDENTIFICATION REGISTER (IIR) ............................................................................ 60
FIFO CONTROL REGISTER (FCR).............................................................................................. 62
LINE CONTROL REGISTER (LCR).............................................................................................. 63
MODEM CONTROL REGISTER (MCR) ....................................................................................... 64
LINE STATUS REGISTER (LSR) ................................................................................................ 65
MODEM STATUS REGISTER (MSR).......................................................................................... 66
SCRATCHPAD REGISTER (SCR) ............................................................................................... 67
PROGRAMMABLE BAUD RATE GENERATOR DIVISOR LATCHES ........................................... 67
The Affects of RESET on the UART Registers............................................................................ 68
FIFO INTERRUPT MODE OPERATION...................................................................................................... 68
FIFO POLLED MODE OPERATION......................................................................................................... 69
NOTES ON SERIAL PORT FIFO MODE OPERATION................................................................................... 70
GENERAL................................................................................................................................. 70
TX AND RX FIFO OPERATION................................................................................................... 71
INFRARED INTERFACE .................................................................................................................... 71
IRDA SIR/FIR AND ASKIR ................................................................................................................ 71
CONSUMER IR.................................................................................................................................. 72
HARDWARE INTERFACE...................................................................................................................... 72
IR HALF DUPLEX TURNAROUND DELAY TIME........................................................................................... 72
PARALLEL PORT............................................................................................................................. 74
IBM XT/AT COMPATIBLE, BI-DIRECTIONAL AND EPP MODES........................................................ 75
DATA PORT.............................................................................................................................. 75
STATUS PORT.......................................................................................................................... 75
CONTROL PORT ....................................................................................................................... 76
EPP ADDRESS PORT................................................................................................................ 77
EPP DATA PORT 0.................................................................................................................... 77
EPP DATA PORT 1.................................................................................................................... 77
EPP DATA PORT 2.................................................................................................................... 77
EPP DATA PORT 3.................................................................................................................... 77
EPP 1.9 OPERATION .................................................................................................................... 77
Software Constraints................................................................................................................. 78
EPP 1.9 Write............................................................................................................................ 78
EPP 1.9 Read ............................................................................................................................ 78
EPP 1.7 OPERATION .................................................................................................................... 79
Software Constraints................................................................................................................. 79
EPP 1.7 Write............................................................................................................................ 79
EPP 1.7 Read ............................................................................................................................ 79
EXTENDED CAPABILITIES PARALLEL PORT.................................................................................. 81
Vocabulary ............................................................................................................................... 81
ISA IMPLEMENTATION STANDARD.......................................................................................... 82
SMSC DS – FDC37N869
Page 5
Rev. 11/09/2000
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