KK82C55 View Datasheet(PDF) - Kodenshi Auk Co., LTD

Part Name

Description

Manufacturer

KK82C55

CHMOS PROGRAMMABLE PERIPHERAL INTERFACE

Kodenshi Auk Co., LTD 

KK82C55A

Bidirectional Bus I/O Control Signal Definition

INTR (Interrupt Request). A high on this output can be used to interrupt the CPU for input or output operations.

Output Operations

OBF (Output Buffer Full). The OBF output will go “low” to indicate that the CPU has written data out to port A.

ACK (Acknowledge). A “low” on this input enables the tri-state output buffer of Port A to send out the data.

Otherwise, the output buffer will be in the high impedance state.

INTE 1 (The INTE Flip-Flop Associated with OBF ). Controlled by bit set/reset of PC6.

Input Operations

STB (Strobe Input). A “low” on this input loads data into the input latch.

IBF (Input Buffer Full F/F). A “high” on this output indicates that data has been loaded into the input latch.

INTE 2 (The INTE Flip-Flop Associated with IBF). Controlled by bit set/reset of PC4.

CONTROL WORD

D7 D6 D5 D4 D3 D2 D1 D0

1 1 X X X 1/0 1/0 1/0

PC2-0

1 – INPUT

0 – OUTPUT

PORT B

1 – INPUT

0 – OUTPUT

GROUP B

1 – INPUT

0 – OUTPUT

Figure 13. MODE Control Word

PC3

PA7-PA0

PC7

INTE

PC6

1

INTRA

OBFA

ACKA

WR

PC4

STBA

INTE

PC5

2

IBFA

RD

3

PC2-0

Figure 14. MODE 2

14

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