MAX11141ATI View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MAX11141ATI Datasheet PDF : 40 Pages
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MAX11135–MAX11143
500ksps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
ELECTRICAL CHARACTERISTICS (MAX11135/MAX11136/MAX11137) (continued)
(VDD = 2.35V to 3.6V, VOVDD = 1.5V to 3.6V, fSAMPLE = 500ksps, fSCLK = 8MHz, 50% duty cycle, VREF+ = VDD, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at TA = +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TIMING CHARACTERISTICS (Figure 1) (Note 11)
SCLK Clock Period
SCLK Duty Cycle
SCLK Fall to DOUT Transition
16th SCLK Fall to DOUT Disable
14th SCLK Fall to DOUT Disable
SCLK Fall to DOUT Enable
DIN to SCLK Rise Setup
SCLK Rise to DIN Hold
CS Fall to SCLK Fall Setup
SCLK Fall to CS Fall Hold
CNVST Pulse Width
tCP Externally clocked conversion
125
tCH
40
tDOT
CLOAD =
10pF
VOVDD = 1.5V to 2.35V
VOVDD = 2.35V to 3.6V
4
4
tDOD CLOAD = 10pF, channel ID on
CLOAD = 10pF, channel ID off
tDOE CLOAD = 10pF
tDS
4
tDH
1
tCSS
4
tCSH
1
tCSW See Figure 6
5
CS or CNVST Rise to EOC Low
(Note 7)
tCNV_INT See Figure 7, fSAMPLE = 500ksps
CS Pulse Width
tCSBW
5
TYP
5.3
MAX UNITS
ns
60
%
16.5
ns
15
15
ns
16
ns
14
ns
ns
ns
ns
ns
ns
6.2
Fs
ns
ELECTRICAL CHARACTERISTICS (MAX11138/MAX11139/MAX11140)
(VDD = 2.35V to 3.6V, VOVDD = 1.5V to 3.6V, fSAMPLE = 500ksps, fSCLK = 8MHz, 50% duty cycle, VREF+ = VDD, TA = -40NC to +125NC,
unless otherwise noted. Typical values are at TA = +25NC.) (Note 2)
PARAMETER
DC ACCURACY (Notes 3 and 4)
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Offset Error Temperature
Coefficient
Gain Temperature Coefficient
Channel-to-Channel Offset
Matching
Line Rejection
SYMBOL
CONDITIONS
RES
INL
DNL
10 bit
No missing codes
(Note 5)
OETC
GETC
PSR (Note 6)
MIN
TYP
MAX UNITS
10
Bits
±0.4
LSB
±0.4
LSB
0.5
±1.0
LSB
-0.2
±1.1
LSB
±2
ppm/NC
±0.8
ppm/NC
±0.5
LSB
±0.1
±0.3
LSB/V
5
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