MAX12555(2004) View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MAX12555 Datasheet PDF : 28 Pages
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14-Bit, 95Msps, 3.3V ADC
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +3.6V
OVDD to GND........-0.3V to the lower of (VDD + 0.3V) and +3.6V
INP, INN to GND ...-0.3V to the lower of (VDD + 0.3V) and +3.6V
REFIN, REFOUT, REFP, REFN, COM
to GND................-0.3V to the lower of (VDD + 0.3V) and +3.6V
CLKP, CLKN, CLKTYP, G/T, DCE,
PD to GND ........-0.3V to the lower of (VDD + 0.3V) and +3.6V
D13–D0, DAV, DOR to GND....................-0.3V to (OVDD + 0.3V)
Continuous Power Dissipation (TA = +70°C)
40-Pin Thin QFN 6mm x 6mm x 0.8mm
(derated 26.3mW/°C above +70°C)........................2105.3mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering 10s) ..................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = 3.3V, OVDD = 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, fCLK = 95MHz (50% duty cycle, 1.4VP-P square wave), TA = -40°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
DC ACCURACY (Note 2)
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
ANALOG INPUT (INP, INN)
Differential Input Voltage Range
Common-Mode Input Voltage
Input Capacitance
(Figure 3)
CONVERSION RATE
Maximum Clock Frequency
Minimum Clock Frequency
INL
DNL
fIN = 3MHz
fIN = 3MHz
VREFIN = 2.048V
VREFIN = 2.048V
VDIFF Differential or single-ended inputs
CPAR Fixed capacitance to ground
CSAMPLE Switched capacitance
fCLK
14
Bits
±1.6
LSB
±0.65
LSB
±0.1 ±0.78 %FS
±0.35 ±5.3 %FS
±1.024
V
VDD / 2
V
2
pF
4.5
95
MHz
5
MHz
Data Latency
Figure 6
8.0
Clock
cycles
DYNAMIC CHARACTERISTICS (Differential Inputs) (Note 2)
Small-Signal Noise Floor
Signal-to-Noise Ratio
Signal-to-Noise and Distortion
SSNF
SNR
SINAD
Input at less than -35dBFS
fIN = 3MHz at -0.5dBFS (Notes 3, 4)
fIN = 47.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
fIN = 175MHz at -0.5dBFS (Notes 3, 4)
fIN = 3MHz at -0.5dBFS (Notes 3, 4)
fIN = 47.5MHz at -0.5dBFS
fIN = 70MHz at -0.5dBFS
fIN = 175MHz at -0.5dBFS (Notes 3, 4)
-74.7
67.6 74.2
73.8
73.6
66.9 72.1
66.7 73.8
73.5
72.5
64.0 69.8
dBFS
dB
dB
2 _______________________________________________________________________________________
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