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MAX44264(2010) View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
MAX44264
(Rev.:2010)
MaximIC
Maxim Integrated MaximIC
MAX44264 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Ultra-Low Power Op Amp in
a Tiny 6-Bump WLP
TOP VIEW
MAX44264
+
IN+
A1
A2
VSS
IN-
B1
B2
VDD
OUT
C1 C2
N.C.
Pin Configuration
WLP BUMP
SIDE DOWN
Pin Description
PIN
NAME
FUNCTION
A1
IN+
Noninverting Amplifier Input
A2
VSS
Negative Power-Supply Voltage
B1
IN-
Inverting Amplifier Input
B2
VDD
Positive Power-Supply Voltage
C1
OUT
Amplifier Output
C2
N.C.
No Connection. Not internally connected.
Applications Information
Ground Sensing
The common-mode input range of the MAX44264
extends down to ground, and offers excellent common-
mode rejection. These devices are guaranteed not to
undergo phase reversal when the input is overdriven.
Power Supplies and Layout
The IC operates from a single +1.8V to +5.5V power
supply. Bypass power supplies with a 0.1µF ceramic
capacitor placed close to the VDD pin.
Ground layout improves performance by decreasing the
amount of stray capacitance and noise at the op amp’s
inputs and outputs. To decrease stray capacitance, mini-
mize PCB lengths and resistor leads, and place external
components close to the op amps’ pins.
Bandwidth
The IC is internally compensated for unity-gain stability
and has a typical gain-bandwidth of 9kHz.
Stability
The IC maintains stability in their minimum gain configu-
ration while driving capacitive loads. Although this prod-
uct family is primarily designed for low-frequency
applications, good layout is extremely important
because low-power requirements demand high-imped-
ance circuits. The layout should also minimize stray
capacitance at the amplifier inputs. However some stray
capacitance may be unavoidable, and it may be neces-
sary to add a 2pF to 10pF capacitor across the feedback
resistor as shown in Figure 1. Select the smallest capaci-
tor value that ensures stability.
VCC
VIN
MAX44264
VSS R1
R2
2pF TO 10pF
Figure 1. Compensation for Feedback Node Capacitance
PROCESS: BiCMOS
Chip Information
8 _______________________________________________________________________________________

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