MAX6650 View Datasheet(PDF) - Maxim Integrated

Part Name

Description

Manufacturer

MAX6650

Fan-Speed Regulators and Monitors with SMBus/I2C-Compatible Interface

Maxim Integrated 

MAX6650/MAX6651

Fan-Speed Regulators and Monitors

with SMBus/I2C-Compatible Interface

VFAN = 5V OR 12V

VCC

3V TO 5.5V

VCC

SMBus/I2C

INTERFACE

MAX6650

FAN SPEED

MAX6651

90kΩ

TACH0

FAN

SCL

CONFIGURE

SMBus/I2C

INTERFACE

SDA

ALARM ENABLE

10kΩ

ALARM STATUS

FB

TACHOMETER

TACH COUNT

COUNT

VOFFSET

90kΩ

COUNT TIME

GPIO DEF

OUT

GPIO STATUS

CONTROL

LOGIC

10kΩ

DAC

10kΩ

ADD

ADDRESS

DECODE

GND

8-BIT

DAC

VREF

GPIO0

GPIO1

GPIO

BLOCKS

(FIGURE 5)

ALERT

FULL ON

Figure 1. Block Diagram

The MAX6650/MAX6651 employ three standard SMBus

protocols: write byte, read byte, and receive byte

(Figure 2). The shorter protocol (receive) allows quicker

transfers, provided that the correct data register was

previously selected by a write or read byte instruction.

Use caution with the shorter protocol in multimaster

systems, since a second master could overwrite the

command byte without informing the first master.

Slave Addresses

The device address can be set to one of four different

values. Accomplish this by pin-strapping ADD so that

more than one MAX6650/MAX6651 can reside on the

same bus without address conflicts (Table 1).

Table 1. Slave Address Decoding (ADD)

ADD

GND

VCC

No connection (high-Z)

10kΩ resistor to GND

ADDRESS

HEX

BINARY

90

1001 000

96

1001 011

36

0011 011

3E

0011 111

6

Maxim Integrated

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