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MAX809R(1999) View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
MAX809R
(Rev.:1999)
MaximIC
Maxim Integrated MaximIC
MAX809R Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
3-Pin Microprocessor Reset Circuits
_____________________Pin Description
PIN NAME
1
GND
RESET
(MAX803/
MAX809)
2
RESET
(MAX810)
3
VCC
FUNCTION
Ground
RESET Output remains low while VCC
is below the reset threshold, and for at
least 140ms after VCC rises above the
reset threshold.
RESET Output remains high while VCC
is below the reset threshold, and for at
least 140ms after VCC rises above the
reset threshold.
Supply Voltage (+5V, +3.3V, +3.0V, or
+2.5V)
VCC
MAX809
RESET
R1
GND
100k
Figure 2. RESET Valid to VCC = Ground Circuit
400
TA = +25°C
320
240
160
MAX8_ _J/L/M
80
MAX8_ _R/S/T/Z
0
1
10
100
1000
RESET COMPARATOR OVERDRIVE, VTH - VCC (mV)
Figure 1. Maximum Transient Duration Without Causing a
Reset Pulse vs. Reset Comparator Overdrive
Detailed Description
A microprocessor’s (µP’s) reset input starts the µP in a
known state. The MAX803/MAX809/MAX810 assert
reset to prevent code-execution errors during power-
up, power-down, or brownout conditions. They assert a
reset signal whenever the VCC supply voltage declines
below a preset threshold, keeping it asserted for at
least 140ms after VCC has risen above the reset thresh-
old. The MAX803 uses an open-drain output, and the
MAX809/MAX810 have a push-pull output stage.
Connect a pull-up resistor on the MAX803’s RESET out-
put to any supply between 0 and 6V.
Applications Information
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, the MAX803/
MAX809/MAX810 are relatively immune to short-duration
negative-going VCC transients (glitches).
Figure 1 shows typical transient duration vs. reset com-
parator overdrive, for which the MAX803/MAX809/
MAX810 do not generate a reset pulse. The graph was
generated using a negative-going pulse applied to VCC,
starting 0.5V above the actual reset threshold and end-
ing below it by the magnitude indicated (reset compara-
tor overdrive). The graph indicates the maximum pulse
width a negative-going VCC transient can have without
causing a reset pulse. As the magnitude of the transient
increases (goes farther below the reset threshold), the
maximum allowable pulse width decreases. Typically, for
the MAX8__L and MAX8__M, a VCC transient that goes
100mV below the reset threshold and lasts 20µs or less
will not cause a reset pulse. A 0.1µF bypass capacitor
mounted as close as possible to the VCC pin provides
additional transient immunity.
Ensuring a Valid Reset Output
Down to VCC = 0
When VCC falls below 1V, the MAX809 RESET output
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This presents no problem in most applications since
most µP and other circuitry is inoperative with VCC
below 1V. However, in applications where RESET must
be valid down to 0V, adding a pull-down resistor to
RESET causes any stray leakage currents to flow to
_______________________________________________________________________________________ 5

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