MC68HCP11A1MP View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MC68HCP11A1MP

8-Bit Microcontrollers

Motorola => Freescale 

TEST1 — Factory Test

Bit 7

6

TILOP

0

RESET:

0

0

Test Modes Only

5

OCCR

0

4

CBYP

0

3

DISR

—

2

FCM

0

$103E

1

FCOP

0

Bit 0

TCON

0

TILOP — Test Illegal Opcode

OCCR — Output Condition Code Register to Timer Port

CBYP — Timer Divider Chain Bypass

DISR — Disable Resets from COP and Clock Monitor

DISR is forced to one out of reset in special test and bootstrap modes.

FCM — Force Clock Monitor Failure

FCOP — Force COP Watchdog Failure

TCON — Test Configuration Register

CONFIG — COP, ROM, EEPROM Enables

Bit 7

6

5

4

0

0

0

0

RESET:

0

0

0

0

$103F

3

NOSEC

—

2

NOCOP

—

1

ROMON

—

Bit 0

EEON

—

NOTE

The bits of this register are implemented with EEPROM cells. Programming and

erasing follow normal EEPROM procedures. The erased state of CONFIG is $0F.

A new value is not readable until after a subsequent reset sequence. CONFIG can

only be programmed or erased in special modes.

NOSEC — EEPROM Security Disable

Refer to 4 Electrically Erasable Programmable Read-Only Memory (EEPROM).

NOCOP — COP System Disable

Refer to 3 Resets and Interrupts.

ROMON — ROM Enable

In single-chip mode, ROMON is forced to one out of reset.

0 = 8K ROM removed from the memory map

1 = 8K ROM present in the memory map

EEON — EEPROM Enable

0 = EEPROM is removed from the memory map

1 = EEPROM is present in the memory map

MOTOROLA

12

MC68HC11A8

MC68HC11A8TS/D

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