MC68SZ328 View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MC68SZ328

Integrated Portable System Processor Product Brief

Motorola => Freescale 

Features

Freescale Semiconductor, Inc.

• Universal asynchronous receiver/transmitters (UARTs)

— Two identical UARTs with interrupt-based operation

— Support for serial data transmit/receive operation: 7 or 8 data bits, 1 or 2 stop bits,

programmable parity (even, odd, or none)

— Programmable standard baud rates up to 460.8 kbps

— Receive FIFO size is 32 bytes; transmit FIFO size is 32 bytes

— Both UARTs IrDA 1.0 ready

— Maximum non-standard baud rate of 4.14 Mbps

— Flexible DMA burst access to both UART 1 and UART 2 FIFO architectures

• Configurable serial peripheral interface (CSPI)

— Master/slave configurable

— 8 × 16 data-in FIFO and 8 × 16 data-out FIFO

— Flow control signals incorporated to enable fast data communication

• Reset module

— Provides stable system power-on reset and normal reset

• Bootstrap mode function

— Allows user to initialize system and download programs or data to system memory through

either UART

— Accepts execution command to run program stored in system memory

— Provides a 32-byte-long instruction buffer for 68000 instruction storage and execution

• Universal Serial Bus (USB) device

— Compliant with Universal Serial Bus Specification revision 1.1.

— Endpoint configurations are as shown in Table 4 on page 9. Five pipes are available for

mapping.

– Endpoint 0 is required by the USB specification.

– Endpoints 1, 2, 3, and 4 may be configured as bulk or interrupt pipes (IN or OUT).

— A frame match interrupt feature is supported to notify the user when a specific USB frame

occurs. For DMA access, the maximum packet size for each endpoint is restricted by the FIFO

size of the endpoint.

— Four bulk/interrupt pipes are supported for 12 Mbps data transfer. The packet sizes are limited

to 8, 16, 32, or 64 bytes, and the maximum packet size depends on the FIFO size of endpoint.

— No power drawn from the USB bus.

— Remote wake-up feature is supported via a register bit.

— Complete FIFO interrupts are provided (full, empty, error, high, low).

— End-of-frame and start-of-frame interrupt support.

— Full-speed (12 MHz) operation.

— Intelligence related to packet retries and data framing is built into the FIFO controller.

8

MC68SZ328 Product Brief

MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

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