MK2058-01 View Datasheet(PDF) - Integrated Circuit Systems

Part Name

Description

Manufacturer

MK2058-01

Communications Clock Jitter Attenuator

Integrated Circuit Systems 

MK2058-01

Communications Clock Jitter Attenuator

Functional Description

The MK2058-01 is a clock generator IC that generates

an output clock directly from an internal VCXO circuit

which works in conjunction with an external quartz

crystal. The VCXO is controlled by an internal PLL

(Phase Locked Loop) circuit, enabling the device to

perform clock regeneration from an input reference

clock. The MK2058-01 is configured to provide an

output clock that is the same frequency as the input

clock. There are 12 selectable input / output frequency

ranges, each of which is a submultiple of the supported

quartz crystal frequency range. Please refer to the

Output Clock Selection Table on Page 2.

Most typical PLL clock devices use an internal VCO

(Voltage Controlled Oscillator) for output clock

generation. By using a VCXO with an external crystal,

the MK2058-01 is able to generate a low jitter, low

phase-noise output clock within a low bandwidth PLL.

This serves to provide input clock jitter attenuation and

enables stable operation with a low frequency

reference clock.

The VCXO circuit requires an external pullable crystal

for operation. External loop filter components enable a

PLL configuration with low loop bandwidth.

Application Information

Input / Output Frequency Configuration

The MK2058-01 is configured to generate an output

frequency that is equal to the input reference

frequency. Clock frequencies that are supported are

those which fall into the ranges listed in the Output

Clock Selection Table on Page 2. Input bits SEL2:0 are

set according to this table, as is the external crystal

frequency. The nominal (center) frequency of the

external crystal will be an integer multiple of the input /

output clock as specified. Please refer to the Quartz

Crystal section on this page regarding external crystal

requirements.

Input Mux

The Input Mux serves to select between two alternate

input reference clocks. Upon reselection of the input

clock, clock glitches on the output clock will not be

generated due to the “fly-wheel” effect of the VCXO

(the quartz crystal is a high-Q tuned circuit). When the

input clocks are not phase aligned, the phase of the

output clock will change to reflect the phase of the

newly selected input at a controlled phase slope (rate

of phase change) as influenced by the PLL loop

characteristics.

Quartz Crystal

It is important that the correct type of quartz crystal is

used with the MK2058-01. Failure to do so may result

in reduced frequency pullability range, inability of the

loop to lock, or excessive output phase jitter.

The MK2058-01 operates by phase-locking the VCXO

circuit to the input signal of the selected ICLK input.

The VCXO consists of the external crystal and the

integrated VCXO oscillator circuit. To achieve the best

performance and reliability, a crystal device with the

recommended parameters (shown below) must be

used, and the layout guidelines discussed in the PCB

Layout Recommendations section must be followed.

The frequency of oscillation of a quartz crystal is

determined by its cut and by the external load

capacitance. The MK2058-01 incorporates variable

load capacitors on-chip which “pull”, or change, the

frequency of the crystal. The crystals specified for use

with the MK2058-01 are designed to have zero

frequency error when the total of on-chip + stray

capacitance is 14pF. To achieve this, the layout should

use short traces between the MK2058-01 and the

crystal.

A complete description of the recommended crystal

parameters is shown below.

Recommended Crystal Parameters:

Operating Temperature Range

Commercial Applications

Industrial Applications

Initial Accuracy at 25°C

Temperature Stability

Aging

Load Capacitance

Shunt Capacitance, C0

C0/C1 Ratio

Equivalent Series Resistance

0 to 70°C

-40 to 85°C

±20 ppm

±30 ppm

±20 ppm

Note 1

7 pF Max

250 Max

35 Ω Max

Note 1: For crystal frequencies between 13.5MHz and

27MHz the nominal crystal load capacitance

specification should be 14pF. Contact ICS MicroClock

applications at (408) 297-1201 regarding the use of a

crystal below 13.5MHz.

MDS 2058-01 B

3

Revision 071001

Integrated Circuit Systems, Inc. q 525 Race Street, San Jose, CA 95126 q tel (408) 295-9800 q www.icst.com

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