MT46V4M32 View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT46V4M32

DOUBLE DATA RATE (DDR) SDRAM

Micron Technology 

Commands

Truth Table 1 provides a quick reference of avail-

able commands. This is followed by a verbal descrip-

tion of each command. Two additional Truth Tables

ADVANCE

128Mb: x32

DDR SDRAM

appear following the Operation section; these tables

provide current state/next state information.

TRUTH TABLE 1 – COMMANDS

(Note: 1)

NAME (FUNCTION)

DESELECT (NOP)

NO OPERATION (NOP)

ACTIVE (Select bank and activate row)

READ (Select bank and column, and start READ burst)

WRITE (Select bank and column, and start WRITE burst)

BURST TERMINATE

PRECHARGE (Deactivate row in bank or banks)

AUTO REFRESH or SELF REFRESH

(Enter self refresh mode)

LOAD MODE REGISTER

CS# RAS# CAS# WE# ADDR NOTES

HXXX

X

9

L HHH

X

9

L L H H Bank/Row 3

L H L H Bank/Col 4

L H L L Bank/Col 4

L HH L

X

8

L LHL

Code

5

L L LH

X

6, 7

L L L L Op-Code 2

TRUTH TABLE 1A – DM OPERATION

NAME (FUNCTION)

Write Enable

Write Inhibit

DM DQs NOTES

L Valid 10

H

X

10

NOTE: 1. CKE is HIGH for all commands shown except SELF REFRESH.

2. BA0-BA1 select either the mode register or the extended mode register (BA0 = 0, BA1 = 0 select the mode register;

BA0 = 1, BA1 = 0 select extended mode register; other combinations of BA0-BA1 are reserved). A0-A11 provide the op-

code to be written to the selected mode register.

3. BA0-BA1 provide bank address and A0-A11provide row address.

4. BA0-BA1 provide bank address; A0-A7provide column address; A8 HIGH enables the auto precharge feature (nonpersis-

tent), and A8 LOW disables the auto precharge feature.

5. A8 LOW: BA0-BA1 determine which bank is precharged.

A8 HIGH: all banks are precharged and BA0-BA1 are “Don’t Care.”

6. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.

7. Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t Care” except for CKE.

8. Applies only to read bursts with auto precharge disabled; this command is undefined (and should not be used) for READ

bursts with auto precharge enabled and for WRITE bursts.

9. DESELECT and NOP are functionally interchangeable.

10. Used to mask write data; provided coincident with the corresponding data.

128Mb: x32 DDR SDRAM

4M32DDR_B.p65 – Rev. B, Pub. 7/02

11

Micron Technology, Inc., reserves the right to change products or specifications without notice.

©2002, Micron Technology, Inc.

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