MTB12P04J3 View Datasheet(PDF) - Cystech Electonics Corp.

Part Name

Description

Manufacturer

MTB12P04J3

P-Channel Logic Level Enhancement Mode Power MOSFET

Cystech Electonics Corp. 

CYStech Electronics Corp.

TO-252 Dimension

Spec. No. : C734J3

Issued Date : 2009.07.09

Revised Date :

Page No. : 7/7

Marking:

Device Name

Date code

Style: Pin 1.Gate 2.Drain 3.Source

3-Lead TO-252 Plastic Surface Mount Package

CYStek Package Code: J3

DIM

Inches

Min. Max.

A 0.0827 0.0984

A1 0.0374 0.0512

B 0.0118 0.0335

B1 0.0157 0.0370

B2 0.0236 0.0394

C 0.0157 0.0236

D 0.2087 0.2441

D2 0.2638 0.2874

D3 0.0866 0.1181

Millimeters

Min. Max.

2.10 2.50

0.95 1.30

0.30 0.85

0.40 0.94

0.60 1.00

0.40 0.60

5.30 6.20

6.70 7.30

2.20 3.00

DIM

Inches

Min. Max.

E 0.2520 0.2638

E2 0.1890 0.2146

H 0.3622 0.3996

L 0.0350 0.0669

L1 0.0354 0.0650

L2 0.0197 0.0433

L3 0.0000 0.0118

P 0.0827 0.0984

Millimeters

Min. Max.

6.40 6.70

4.80 5.45

9.20 10.15

0.89 1.70

0.90 1.65

0.50 1.10

0.00 0.30

2.10 2.50

Notes: 1.Controlling dimension: millimeters.

2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.

3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.

Material:

• Lead : Pure tin plated

• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0

Important Notice:

• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.

• CYStek reserves the right to make changes to its products without notice.

• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.

• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.

MTB12P04J3

CYStek Product Specification

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