LC8390M View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC8390M Datasheet PDF : 12 Pages
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LC8390M
Allowable Operating Ranges
at Ta = –30 to 70°C, all VDD = 4.75 to 5.5 V, all VSS = 0 V unless otherwise specified
Parameter
Operating supply voltage
Input high level voltage
Symbol
VDD
VIH
Input low level voltage
Frequency
External clock
input conditions
Pulse width
Rise and fall times
VIL
fEXT
tEXTH
tEXTL
tEXTR
tEXTF
Conditions
All VDD pins*2
Schmitt inputs, built-in pull-up resistor
inputs*1
Schmitt inputs, built-in pull-up resistor
inputs*1
CLKIN: See figure 1.
RESET low level input pulse width
tRES
RESET: See figure 2.
Transfer bit
clock period
tBCYC
Transfer clock
input conditions
Transfer bit clock
pulse width
Transfer bit clock
setup time
tBCW
tBCS
ADBCK, DABCK, ADLRCK, and DALRCK:
See figures 3 and 4.
Transfer bit clock
hold time
tBCH
D/A converter data
input conditions
Data setup time
Data hold time
tDS
DABCK and DADATA: See figure 3.
tDH
Note 1: TEST, CLKCTL, ADLRCK, ADBCK, CLKIN, DADATA, DALRCK, DABCK, RESET
2: Apply the same voltage to the DVDD, ADLVDD, ADRVDD, DALVDD and DARVDD pins.
min
4.75
0.75 VDD
Ratings
typ
12.16
16
15 cycles of
the CLKIN
input clock
325
100
70
70
Unit
max
5.5
V
V
0.25 VDD
24.83
V
MHz
ns
9
ns
ns
ns
70
ns
70
ns
ns
ns
Electrical Characteristics 1 at Ta = 25°C, all VDD = 5.0 V, all VSS = 0 V unless otherwise specified
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Total harmonic distortion
A-THD At 1 kHz and 0 dB *
0.025
%
A/D block Signal-to-noise ratio
A-S/N At 1 kHz and 0 dB*
80
dB
Crosstalk
A-C•T At 1 kHz and 0 dB*
–78
dB
Total harmonic distortion
D-THD At 1 kHz and –1 dB*
0.03
%
D/A block Signal-to-noise ratio
D-S/N At 1 kHz and –1 dB*
85
dB
Crosstalk
D-C•T At 1 kHz and –1 dB*
–83
dB
Note: * A-compensation filter used, Fs = 48 kHz, and testing is performed using the Sanyo supplied evaluation board.
Electrical Characteristics 2
at Ta = –30 to 70°C, all VDD = 4.75 to 5.5 V, all VSS = 0 V unless otherwise specified
Parameter
Input low-level current
Output high-level voltage
Output low-level voltage
Input leakage current
Input and output capacitance
Data output timing
Data hold time
Data delay time
Current dissipation
Symbol
IIL
VOH
VOL
ILK
CIO
tOH
tOD
IDD
Conditions
RESET (built-in pull-up resistor inputs):
VIN = VSS
ADDATA: IOH = –0.4 mA
ADDATA: IOL = 2 mA
Schmitt inputs: VIN = VSS, VDD
ADDATA: See figure 5.
DVDD
The sum of ADLVDD, ADRVDD, DALVDD
and DARVDD.
Ratings
Unit
min
typ
max
–250
µA
4.0
V
0.4
V
–10
+10
µA
10
pF
0
ns
50
ns
7
14
mA
8
16
mA
No. 4454-5/12
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