NT68P62 View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
NT68P62 Datasheet PDF : 56 Pages
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NT68P62-01
Pin Description (continued)
Pin No.
40 Pin 42 Pin
37
39
Designation
DAC4/SCL1
38
40
[ MODE1 ]
DAC3
[ MODE0 ]
39
41
HSYNCI
Reset Init.
40
42
VSYNCI/INTV VSYNCI
-
6
-
37
[ A14 ]
P40
P41
I/O
Description
O Open drain 5V, D/A converter output 4, shared with open
drain SCL1 line of I2C bus, Schmitt Trigger buffer
[ I ] [ OTP ROM mode select ]
O Open drain 5V, D/A converter output 3
[ I ] [ OTP ROM mode select ]
I Debouncing & Schmitt Trigger input pin for video horizontal
sync signal, internal pull high, shared with composite sync
input
I Debouncing & Schmitt trigger input pin for video vertical
sync signal, internal pull high, shared with input pin of
[ I ] external interrupt source intv with Schmitt Trigger,
selectable triggered, and internal pulled up 22KΩ register
[ OTP ROM program address buffer ]
I/O Bi-directional I/O pin with internal pulled up 22KΩ register,
only 42 pin S-DIP available
I/O Bi-directional I/O pin with internal pulled up 22KΩ register,
only 42 pin S-DIP available
* This RESET pin must be pulled high by external pulled-up register (5KΩ suggestion), or it will remain in low voltage to
continually rest system.
5
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