S-24CS04APH-TF-G View Datasheet(PDF) - Seiko Instruments Inc
Part Name
Description
Manufacturer
S-24CS04APH-TF-G Datasheet PDF : 47 Pages
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2-WIRE CMOS SERIAL E2PROM
S-24CS01A/02A/04A/08A
Rev.4.4_00
7. 3 Sequential Read
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to "1"
following a start condition both in current and random read operations, it responds with an acknowledge.
An 8-bit data is then sent from the E2PROM synchronous to the SCL clock and the address counter is
automatically incremented at the falling edge of the SCL clock for the 8th bit data.
When the master device responds with an acknowledge, the data at the next memory address is
transmitted. Response with an acknowledge by the master device has the memory address counter in the
E2PROM incremented and makes it possible to read data in succession. This is called "Sequential Read".
The master device outputs stop condition not an acknowledge , the reading of E2PROM is ended.
Data can be read in succession in the sequential read mode. When the memory address counter reaches
the last word address, it rolls over to the first memory address.
SDA
LINE
R
DEVICE E
ADDRESS A
D
D7
1
RA
/C
WK
A
C
K
D0 D7
A
C
K
D0 D7
NO ACK from
Master Device
S
A
T
C
O
K
P
D0 D7
D0
DATA(n)
DATA (n+1)
DATA (n+2)
DATA (n+x)
ADR INC
ADR INC
Figure 18 Sequential Read
ADR INC
ADR INC
18
Seiko Instruments Inc.
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