SC18IS600(2006) View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
Manufacturer
SC18IS600 Datasheet PDF : 28 Pages
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NXP Semiconductors
SC18IS600/601
SPI to I2C-bus interface
6. Functional description
The SC18IS600/601 acts as a bridge between a SPI interface and an I2C-bus. It allows a
SPI master device to communicate with I2C-bus slave devices. The SPI interface supports
Mode 3 of the SPI specification and can operate up to 3 Mbit/s (SC18IS601).
6.1 Internal registers
The SC18IS600/601 provides internal registers for monitoring and control. These
registers are shown in Table 3. Register functions are more fully described in the following
paragraphs.
Table 3. Internal registers summary
Register Register Bit 7
address
Bit 6
Bit 5
0x00
IOConfig IO3.1[1] IO3.0[1] IO2.1
0x01
IOState 0
0
GPIO5
0x02
I2CClock CR7 CR6 CR5
0x03
I2CTO TO6 TO5 TO4
0x04
I2CStat 1
1
1
0x05
I2CAdr ADR7 ADR6 ADR5
Bit 4
IO2.0
GPIO4
CR4
TO3
1
ADR4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
IO1.1
IO1.0
IO0.1
IO0.0
R/W
GPIO3[2] GPIO2 GPIO1 GPIO0 R/W
CR3
CR2
CR1
CR0
R/W
TO2
TO1
TO0
TE
R/W
I2CSTAT3 I2CSTAT2 I2CSTAT1 I2CSTAT0 R
ADR3
ADR2
ADR1
X
R/W
Default
value
0x00
0x3F
0x19
0xFE
0xF0
0x00
[1] For SC18IS601, these bits are ‘Don’t care’.
[2] For SC18IS601 GPIO3 is not used.
6.2 Register descriptions
6.2.1 Programmable IO port configuration register (IOConfig)
Pins GPIO0 to GPIO3 may be configured by software to one of four types. These are:
quasi-bidirectional, push-pull, open-drain, and input-only. Two configuration bits per pin,
located in the IOConfig register, select the IO type for each pin. Each pin has
Schmitt-triggered input that also has a glitch suppression circuit. IO4 and IO5 are
quasi-bidirectional pins and are not user-configurable. For SC18IS601, GPIO3 is
non-existent.
Table 4 shows the configurations for the programmable I/O pins. IOx.1 and IOx.0
correspond to GPIOx.
Table 4.
IOx.1
0
0
1
1
Pin configurations
IOx.0
Pin configuration
0
quasi-bidirectional output configuration
1
input-only configuration
0
push-pull output configuration
1
open-drain output configuration
SC18IS600_601_3
Product data sheet
Rev. 03 — 13 December 2006
© NXP B.V. 2006. All rights reserved.
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