SST25VF010 View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

Manufacturer

SST25VF010

1 Mbit SPI Serial Flash

Silicon Storage Technology 

1 Mbit SPI Serial Flash

SST25VF010

PIN DESCRIPTION

Data Sheet

CE#

SO

WP#

VSS

1

8

2

7

Top View

3

6

4

5

1233 08-soic P1.0

8-LEAD SOIC

VDD

HOLD#

SCK

SI

CE# 1

SO 2

WP# 3

Top View

8 VDD

7 HOLD#

6 SCK

VSS 4

5 SI

1233 08-wson P2.0

8-CONTACT WSON

FIGURE 1: PIN ASSIGNMENTS

TABLE 1: PIN DESCRIPTION

Symbol Pin Name

SCK Serial Clock

SI

Serial Data

Input

SO

Serial Data

Output

CE#

Chip Enable

WP#

HOLD#

VDD

VSS

Write Protect

Hold

Power Supply

Ground

Functions

To provide the timing of the serial interface.

Commands, addresses, or input data are latched on the rising edge of the clock input, while output

data is shifted out on the falling edge of the clock input.

To transfer commands, addresses, or data serially into the device.

Inputs are latched on the rising edge of the serial clock.

To transfer data serially out of the device.

Data is shifted out on the falling edge of the serial clock.

The device is enabled by a high to low transition on CE#. CE# must remain low for the duration of

any command sequence.

The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.

To temporarily stop serial communication with SPI flash memory without resetting the device.

To provide power supply (2.7-3.6V).

T1.0 1233

CE#

MODE 3

SCK MODE 0

MODE 3

MODE 0

SI

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

DON'T CARE

MSB

HIGH IMPEDANCE

SO

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

MSB

1233 F02.1

FIGURE 2: SPI PROTOCOL

©2003 Silicon Storage Technology, Inc.

3

S71233-01-000

8/03

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