SST25VF080B View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
SST25VF080B Datasheet PDF : 36 Pages
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A Microchip Technology Company
8 Mbit SPI Serial Flash
SST25VF080B
Data Sheet
6. To continue programming to the next sequential address location, enter the 8-bit command, ADH, followed by 2 bytes of
data to be programmed. Data Byte 0 will be programmed into the initial address [A23-A1] with A0=0, Data Byte 1 will be
programmed into the
initial address [A23-A1] with A0=1.
7. The Read-Status-Register is continuous with ongoing clock cycles until terminated by a low to high transition on CE#.
8. Manufacturer’s ID is read with A0=0, and Device ID is read with A0=1. All other address bits are 00H. The Manufac-
turer’s ID and device ID output stream is continuous until terminated by a low-to-high transition on CE#.
Read (25/33 MHz)
The Read instruction, 03H, supports up to 25 MHz (for SST25VF080B-50-xx-xxxx) or 33 MHz (for
SST25VF080B-80-xx-xxxx) Read. The device outputs the data starting from the specified address
location. The data output stream is continuous through all addresses until terminated by a low to high
transition on CE#. The internal address pointer will automatically increment until the highest memory
address is reached. Once the highest memory address is reached, the address pointer will automati-
cally increment to the beginning (wrap-around) of the address space. Once the data from address
location 1FFFFFH has been read, the next output will be from address location 000000H.
The Read instruction is initiated by executing an 8-bit command, 03H, followed by address bits [A23-
A0]. CE# must remain active low for the duration of the Read cycle. See Figure 5 for the Read
sequence.
CE#
MODE 3
SCK MODE 0
0 1 2345 6 78
15 16
23 24 31 32 39 40
47 48 55 56 63 64 70
SI
03
ADD. ADD. ADD.
MSB
MSB
SO
HIGH IMPEDANCE
N
DOUT
N+1
DOUT
N+2
DOUT
N+3
DOUT
N+4
DOUT
MSB
1296 ReadSeq 0.0
Figure 5: Read Sequence
©2011 Silicon Storage Technology, Inc.
10
S71296-05-000
02/11
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