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STV2110A View Datasheet(PDF) - STMicroelectronics

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Description
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STV2110A Datasheet PDF : 15 Pages
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STV2110A
FUNCTIONAL DESCRIPTION
DEFLECTION
Synchronization Separator
The synchronization separator is based on the
bottom of synchronization pulses alignment to an
internal reference voltage. An external capacitor
permits to align synchro. pulses, two external resis-
tors determines the detection threshold of synchro
pulses. The frame synchronization pulses are
locked to a 32µs reference signal to perfect inter-
lacing.
Horizontal Scanning
The horizontal scanning frequency is obtained from
a 500kHz VCO. The circuit uses two phase-locked
loops (PLL). The first one controls the frequency;
the second one, fully integrated, controls the rela-
tive phase of the synchronization and the line fly-
back signals.
The first PLL has two times constants : a long time
constant during the picture to have a good noise
immunity, a short time constant at the beginning of
the frame to recapture faster the phase in case of
VCR video signal. More over, the PLL is in short
time constant three lines before frame pulses oc-
cured, it permits to ensure good interlacing when
the video signal comes from a VCR tape with high
phase error.
The horizontal output signal is 28µs width. On
starting up, horizontal pulses are enabled at
VCC = 6.8V. On shutting down, horizontal pulses
are inhibited for VCC = 6.2V.
Vertical Scanning
The windows for the frame sync detection are
generated by a count down system. The selection
of the windows is determined by the IC status :
- video identification off - window : 248/314
- video identification on - window : 248/352
When a sync pulse is detected inside the window
a 10.5 lines long pulse is provided to VOUT pin.
The count down system provides also the needed
signals for the time constant switch, the line PLL
inhibition and service signals to the rest of the IC.
CHROMA
ACC Amplifier, DL Matrix, Permutator and De-
modulator
The correct chroma subcarrier input, issued from
bandpassor bell filter, is internally selected with the
standard. The ACC amplifier envolves three
stages : the first one select the correct input, the
second one the -6dB in picture (PAL mode), the
third one is controled by the ACC voltage.
The dynamic range is over than 30dB.
The chrominance output signal is fed to the delay
line.
- PAL mode :
the adding and substracting direct and delayed
signals are performed by the DL matrix function.
Two synchronous demodulators multiplies
the (B-Y) signal with the 0 degree phase
4.43MHz reference signal and the (R-Y) signal
with the alternate ± 90 deg. 4.43MHz phase
reference signal.
- SECAM mode :
the permutator separatesthe two (B-Y) and (R-Y)
subcarriers. These signals are demodulated by
two FM demodulators with two external L, C
centered on fO(blue) = 4.25MHz and fO(red) =
4.406MHz.
4.43MHz Phase Locked Loop
The oscillating frequency of the 4.43MHz crystal
oscillator is controlled by the output voltage of the
loop filter. The phase detector will lock the 90 de-
gree reference signal to the direct burst signal.
A 90 degree phase shifter permits to recover the
0 degree reference signal. A flip-flop driven by line
pulses permits to generate the alternate ± 90 de-
gree signal.
ACC Control and Color Killer
PAL mode :
the direct burst signal is demodulated with the ± 90
degree reference signal. The demodulation result
is used by ACC control and killer function.
SECAM mode :
ACC control is done by a X2 demodulator. For
identification the burst signals of the red and blue
lines are demodulated by the external LC con-
nected on Pin 31, it is centered at 4.32MHz. This
give positive and negative signals which are in-
verted by the signal coming out of the SECAM
flip-flop.
In both standard, if the demodulation result is al-
ways positive, the killer capacitor is charged and
the standard is identified (color ON). When de-
modulation result is always negative, the killer ca-
pacitor voltage reaches the flip-flop inhibition level,
so the alternace sequence is reversed and the
capacitor is charged again.
In case of no video signal, both killer capacitors
voltage are maintained about VCC/2, below the
color off threshold.
In PAL or SECAM, the ACC control voltage is
obtained by the peak detection of the demodulated
burst.
3/15

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