USB1T11AMTC(2008) View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
USB1T11AMTC Datasheet PDF : 11 Pages
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March 2008
USB1T11A — Universal Serial Bus Transceiver
Features
Complies with Universal Serial Bus Specification
1.1
Utilizes Digital Inputs and Outputs to Transmit and
Receive USB Cable Data
Supports 12Mbit/s “Full Speed” and 1.5Mbit/s
“Low Speed” Serial Data Transmission
Compatible with the VHDL “Serial Interface Engine”
from USB Implementers' Forum
Supports Single-ended Data Interface
Single 3.3V Supply
ESD Performance: Human Body Model
>9.5kV on D-, D+ pins only
>4kV on all other pins
16-lead, Space-Saving, MLP Package
Description
The USB1T11A is a one-chip, generic USB transceiver.
It is designed to allow 5.0V or 3.3V programmable and
standard logic to interface with the physical layer of the
Universal Serial Bus. It is capable of transmitting and
receiving serial data at both full-speed (12Mbit/s) and
low-speed (1.5Mbit/s) data rates.
The input and output signals of the USB1T11A conform
with the “Serial Interface Engine.” Implementation of the
serial interface engine allows designers to make USB-
compatible devices with off-the-shelf logic to modify and
update the application.
Ordering Information
Operating
Part Number Temperature
Range
Package
Packing
Method
USB1T11AM
USB1T11AMX
USB1T11ABQX
USB1T11AMTC
USB1T11AMTCX
-40 to +85°C
-40 to +85°C
-40 to +85°C
-40 to +85°C
-40 to +85°C
14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC
MS-012, 0.150-Inch Narrow
14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC
MS-012, 0.150-Inch Narrow
16-Terminal, Molded Leadless Package (MLP), JEDEC
MO-220, 3mm Square
14-Lead, Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mmWide
14-Lead, Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 4.4mm Wide
Tube
Tape and Reel
Tape and Reel
Tube
Tape and Reel
All packages are lead free per JEDEC: J-STD-020B standard.
/OE
SPEED
VMO/FSE0
VPO
RCV
D-
D+
+
-
VP
© 1999 Fairchild Semiconductor Corporation
USB1T11A • Rev. 1.0.2
VM
Figure 1. Logic Diagram
www.fairchildsemi.com
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