USB1T11A View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
USB1T11A Datasheet PDF : 11 Pages
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Connection Diagrams
Pin Assignments for SOIC and TSSOP
Logic Diagram
Pin Assignments for MLP
Pin Descriptions
Pin Name
RCV
OE
MODE
VPO, VMO/FSEO
VP, VM
D, D
SUSPND
SPEED
VCC
GND
I/O
O
I
I
I
O
AI/O
I
I
Description
Receive data. CMOS level output for USB differential input
Output Enable. Active LOW, enables the transceiver to transmit data on the bus. When not
active the transceiver is in receive mode.
Mode. When left unconnected, a weak pull-up transistor pulls it to VCC and in this GND, the
VMO/FSEO pin takes the function of FSEO (Force SEO).
Inputs to differential driver. (Outputs from SIE).
MODE
VPO
VMO/FSEO
RESULT
0
0
0
Logic “0”
0
1
SE0
1
0
Logic “1”
1
1
SEO
1
0
0
SE0
0
1
Logic “0”
1
0
Logic “1”
1
1
Illegal code
Gated version of D and D. Outputs are logic “0” and logic “1”. Used to detect single ended
zero (SE0), error conditions, and interconnect speed. (Input to SIE).
VP
VM
RESULT
0
0
SE0
0
1
Low Speed
1
0
Full Speed
1
1
Error
Data, Data. Differential data bus conforming to the Universal Serial Bus standard.
Suspend. Enables a low power state while the USB bus is inactive. While the suspend pin is
active it will drive the RCV pin to a logic “0” state. Both D and D are 3-STATE.
Edge rate control. Logic “1” operates at edge rates for “full speed”.
Logic “0” operates edge rates for “low speed”.
3.0V to 3.6V power supply
Ground reference
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