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VNH3ASP30TR-E View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
VNH3ASP30TR-E
ST-Microelectronics
STMicroelectronics ST-Microelectronics
VNH3ASP30TR-E Datasheet PDF : 34 Pages
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Application information
3
Application information
VNH3ASP30-E
In normal operating conditions the DIAGX/ENX pin is considered as an input pin by the
device. This pin must be externally pulled high.
PWM pin usage: In all cases, a “0” on the PWM pin will turn off both LSA and LSB switches.
When PWM rises back to “1”, LSA or LSB turn on again depending on the input pin state.
Figure 32. Typical application circuit for DC to 20 kHz PWM operation short circuit
protection
VCC
Reg 5V
C
+ 5V
3.3K
1K
DIAGA/ENA
1K
PWM
1K INA
10K CS
33nF
1.5K
HSA
OUTA
LSA
VCC
M
DIAGB/ENB
HSB
OUTB
INB
LSB
+5V
3.3K
1K
1K
C
GNDA
100K
S
G
D
b) N MOSFET
GNDB
Note:
The value of the blocking capacitor (C) depends on the application conditions and defines voltage and current ripple onto supply line
at PWM operation. Stored energy of the motor inductance may fly back into the blocking capacitor, if the bridge driver goes into tri-
state. This causes a hazardous overvoltage if the capacitor is not big enough. As basic orientation, 500µF per 10A load current is
recommended.
In case of a fault condition the DIAGX/ENX pin is considered as an output pin by the device.
The fault conditions are:
overtemperature on one or both high sides
short to battery condition on the output (saturation detection on the low-side power
MOSFET)
Possible origins of fault conditions may be:
OUTA is shorted to ground overtemperature detection on high side A
OUTA is shorted to VCC low-side power MOSFET saturation detection
When a fault condition is detected, the user can know which power element is in fault by
monitoring the INA, INB, DIAGA/ENA and DIAGB/ENB pins.
In any case, when a fault is detected, the faulty leg of the bridge is latched off. To turn on the
respective output (OUTX) again, the input signal must rise from low to high level.
20/34
DocID10833 Rev 7

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