8600V View Datasheet(PDF) - Lattice Semiconductor

Part Name

Description

Manufacturer

8600V

3.3V In-System Programmable SuperBIG™ High Density PLD

Lattice Semiconductor 

Specifications ispLSI 8600V

Figure 8. Boundary Scan Waveforms and Timing Specifications

TMS

TDI

TCK

TDO

Data to be

captured

Data to be

driven out

Tbtch

Tbtsu

Tbtcl

Tbth

Tbtcp

Tbtvo

Tbtco

Valid Data

Tbtcpsu

Tbtcph

Data Captured

Tbtuov

Tbtuco

Valid Data

Tbtoz

Valid Data

Tbtuoz

Valid Data

SYMBOL

tbtcp

tbtch

tbtcl

tbtsu

tbth

trf

tbtco

tbtoz

tbtvo

tbtcpsu

tbtcph

tbtuco

tbtuoz

tbtuov

PARAMETER

TCK Clock Pulse Width

TCK Pulse Width High

TCK Pulse Width Low

TDI, TMS Setup Time to TCK

TDI, TMS Hold Time from TCK

TCK, TDI, TMS Rise and Fall Time

TAP Controller, TCK to TDO Valid

TAP Controller, TCK to TDO High-Impedance

TAP Controller, TCK to TDO High-Impedance to Valid Output

BSCAN Test Capture Register Setup Time

BSCAN Test Capture Register Hold Time

BSCAN Test Update Register Clock to Valid Output

BSCAN Test Update Register Clock to High-Impedance

BSCAN Test Update Register High-Impedance to Valid Output

MIN MAX UNITS

100

—

ns

50

—

ns

50

—

ns

25

—

ns

25

—

ns

50

— mV/ns

—

25

ns

—

25

ns

—

25

ns

25

—

ns

25

—

ns

—

65

ns

—

65

ns

—

65

ns

Table 2-0010/8600V

10

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