BD9778F-E2 View Datasheet(PDF) - ROHM Semiconductor
Part Name
Description
Manufacturer
BD9778F-E2 Datasheet PDF : 17 Pages
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BD9778F, BD9778HFP, BD9001F, BD9781HFP
Technical Note
Design procedure
4. Selection of diode
Set diode rating with an adequate margin to the maximum load
current. Also, make setting of the rated inverse voltage with
an adequate margin to the maximum input voltage.
A diode with a low forward voltage and short reverse recovery
time will provide high efficiency.
Calculation example
When VIN = 36 V and Io = (max.) 2 A,
Select a diode of rated current of 2 A or more and rated
withstand voltage of 36 V or more.
5. Selection of input capacitor
Two capacitors, ceramic capacitor CIN and bypass capacitor C,
should be inserted between the VIN and GND.Be sure to insert
a ceramic capacitor of 1 to 10 µF for the C. The capacitor C
should have a low ESR and a significantly large ripple current.
The ripple current IRMS can be obtained
by the following formula:
IRMS=IO X VO X (Vin-VO)/ Vin2
Select capacitors that can accept this ripple current.
If the capacitance of CIN and C is not optimum,
the IC may malfunction.
6. Setting of oscillation frequency
Referring Fig. 34 and Fig. 35 on the following page, select R
for the oscillation frequency to be used. Furthermore,
in order to eliminate noises, be sure to connect ceramic
capacitors of 0.1 to 1.0 µF in parallel.
7. Setting of phase compensation (Rc and Cc)
The phase margin can be set through inserting a capacitor or
a capacitor and resistor between the INV pin and the FB pin.
Each set value varies with the output coil, capacitance,
I/O voltage, and load. Therefore, set the phase compensation
to the optimum value according to these conditions.
(For details, refer to Application circuit on page 11.)
If this setting is not optimum, output oscillation may result.
When VIN = 13.2 V, Vo = 5 V, and Io = 1 A,
IRMS=1 X 5 X (13.2-5)/(13.2)2
=0.485
IRMS=0.485A
* The set values listed above are all reference values. On the actual mounting of the IC, the characteristics may vary with the routing of wirings
and the types of parts in use. In this connection, it is recommended to thoroughly verify these values on the actual system prior to use.
Directions for pattern layout of PCB
1
GND
BD9778HFP
RT
CT
R3
Cx1
3
2
C3
8 SIGNAL GND
C
Cin
L
8
4
R2 Cx2
L
O
Co
A
D
NMUCP
R1 5
GND
6
Fig.31
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© 2010 ROHM Co., Ltd. All rights reserved.
10/16
2010.02 - Rev. B
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