BD9778F-E2 View Datasheet(PDF) - ROHM Semiconductor

Part Name

Description

Manufacturer

BD9778F-E2

Flexible Step-down Switching Regulators with Built-in Power MOSFET

ROHM Semiconductor 

BD9778F, BD9778HFP, BD9001F, BD9781HFP

Technical Note

Description of operations

ERROR AMP

The ERROR AMP block is an error amplifier used to input the reference voltage (1 V typ.) and the INV pin voltage. The output

FB pin controls the switching duty and output voltage Vo. These INV and FB pins are externally mounted to facilitate phase

compensation. Inserting a capacitor and resistor between these pins enables adjustment of phase margin. (Refer to

recommended examples on page 11.)

SOF T START

The SOFT START block provides a function to prevent the overshoot of the output voltage Vo through gradually increasing

the normal rotation input of the error amplifier when power supply turns ON to gradually increase the switching Duty. The soft

start time is set to 5 msec (Typ.).

ON/OFF(BD9778F/HF P,BD9781HFP)

Setting the EN pin to 0.8 V or less makes it possible to shut down the circuit. Standby current is set to 0 µA (Typ.).

Furthermore, on the BD9781HFP, applying a pulse having a frequency higher than set oscillation frequency to the EN/SYNC

pin allows for external synchronization (up to +50% of the set frequency).

PWM COM PARATOR

The PWM COMPARATOR block is a comparator to make comparison between the FB pin and internal triangular wave and

output a switching pulse.

The switching pulse duty varies with the FB value and can be set in the range of 0 to 100%.

OSC(Oscillator)

The OSC block is a circuit to generate a triangular wave that is to be input in the PWM comparator. Connecting a resistor to

the RT pin enables setting of oscillation frequency.

TSD(Thermal Shut Down)

In order to prevent thermal destruction/thermal runaway of this IC, the TSD block will turn OFF the output when the chip

temperature reaches approximately 150˚C or more. When the chip temperature falls to a specified level, the output will be

reset. However, since the TSD is designed to protect the IC, the chip junction temperature should be provided with the thermal

shutdown detection temperature of less than approximately 150˚C.

CURREN T LIMIT

While the output POWER P-ch MOS FET is ON, if the voltage between drain and source (ON resistance ¥ load current)

exceeds the reference voltage internally set with the IC, this block will turn OFF the output to latch. The overcurrent protection

detection values have been set as shown below:

BD9781HFP . . . 8A(Typ.)

BD9001F,BD9778F/HFP . . . 4A(Typ.)

Furthermore, since this overcurrent protection is an automatically reset, after the output is turned OFF and latched, the latch will

be reset with the RESET signal output by each oscillation frequency.

However, this protection circuit is only effective in preventing destruction from sudden accident. It does not support for the

continuous operation of the protection circuit (e.g. if a load, which significantly exceeds the output current capacitance, is

normally connected). Furthermore, since the overcurrent protection detection value has negative temperature characteristics,

consider thermal design.

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7/16

2010.02 - Rev. B

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