IT8687R View Datasheet(PDF) - ITE Tech. INC.
Part Name
Description
Manufacturer
IT8687R Datasheet PDF : 12 Pages
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Preliminary V0.6
Specifications subject to Change without Notice
IT8687R
I/O Buffer Chip
ITPA-PN-98012 Joseph. Mar. 06
1. Features
n Contains six (6) line drivers (1488)and ten (10)
line receivers(1489)
n Supports two (2) RS-232 serial ports
n Very low power consumption (150mW)
n Supports one (1) crystal oscillator clock generator
n Four power supply inputs:0V,5V,-12V,+12V
n High voltage CMOS process
n 48-pin SSOP package
2. General Description
IT8687R integrates six (6) line drivers, ten (10) line
receivers, one ISA signal encoder, one (1) UART
signal-mixing control logic, and one 24/48 MHz
clock generator. The ISA signals; (1) SA12, SA13,
SA14, SA15, DACK0#, DACK1#, DACK2#,
DACK3#, AEN, RESET are encoded into three (3)
signals -- RAD0, RAD1, RAD2. 16 UART interface
signals are encoded into UIF0, UIF1, UIF2, UIF3,
UIF4 to minimize the pin count and the package
cost. This low power consumption chip is designed
to serve as an interface between data terminal
equipment and data communication equipment in
conformance with the EIA standard RS-232
specifications.
3. Pin Configuration
UIF4/LTX1
1
UIF3/LRTS1
2
UIF2/LRLSD1
3
UIF1/LRX1
4
UIF0/LDTR1
5
GND
6
CLKOUT
7
X2
8
X1
9
RAD2/LDSR1
10
RAD1/LCTS1
11
RAD0/LRI1
12
VCC
13
DACK3#/LRLSD2
14
DACK2#/LRX2
15
DACK1#
16
DACK0#/LTX2
17
AEN/LDSR2
18
GND
19
SA15/LCTS2
20
SA14/LRI2
21
SA13/LRTS2
22
SA12/LDTR2
23
RESET
24
48
MODE
47
VDD
46
TX1
45
RTS1
44
DTR1
43
VSS
42
NC
41
RLSD1
40
RX1
39
DSR1
38
CTS1
37
RI1
36
RLSD2
35
RX2
34
DSR2
33
CTS2
32
RI2
31
NC
30
VSS
29
TX2
28
RTS2
27
DTR2
26
VDD
25
NC
1
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