LV4138W View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

Manufacturer

LV4138W

Bi-CMOS LSI For LCD Panel Drive Single Chip IC

SANYO -> Panasonic 

Continued from preceding page.

Parameter

Black limiter DC voltage

LV4138W

Symbol

VBLIM

Conditions

Input SIG5 (VL = 350mV) to (A) and adjust BLIM to

set the output of TP43 and TP40 to 9Vp-p.

Measure the DC voltage of TP40, TP43, and

TP45.

[Filter characteristics]

Parameter

TRAP attenuation amount

R-Y, B-Y LPF characteristics

Symbol

ATRAPN

ATRAPP

DEMLPF

Conditions

Input SIG2 (0dB, 3.58MHz and

NTSC

4.43MHz) in (A) and measure the TP43 PAL

output with a spectrum analyzer.

Assuming that the TP43 amplitude in

the TRAP ON mode is 0dB, determine

the attenuation in the COMP input

mode.

Input SIG5 (VL = 150mV) in (A) and SIG1

(100kHz) in (B). In this case, assume that the

amplitude of 100kHz component of TP40, TP45

output is 0dB. Change the SIG1 frequency at

which the output amplitude of TP40, TP45

becomes -3dB.

[Sync separation, TG system]

Parameter

Input sync signal width

sensitivity

Symbol

WSSEP

Sync separation input

sensitivity

VSSEP

Sync separation output delay

rate

TDSYL

TDSYH

Horizontal pull-in range

HPLLN

HPLLP

Conditions

Enter SIG5 (VL = 0mV, VS = 143mV, WS variable)

to (A) and confirm synchronization with the TP24

HD output. Narrow WS of SIG5 from 4.7μs and

determine WS at which synchronization between

the input and TP24HD output is lost.

Enter SIG5 (VL = 0mV, WS = 4.7μs, VS variable)

to (A) and confirm synchronization with the TP24

HD output. Reduce VS of SIG5 from 143mV and

determine VS at which synchronization between

the input and TP24HD output is lost.

(A) and measure the delay rate from TP6RPD

output. Assume that TDSYL is for a period from fall

of input HSYNC to fall of RPD output and that

TDSYH is for the period up to rise of RPD output.

Enter SIG5 (VL = 0mV, WS = 4.7μs, and

VS = 143mV, horizontal frequency

variable) to (A) and confirm

NTSC

PAL

synchronization with TP24 HD output.

Change the horizontal frequency of

SIG5 and determine the frequency fH at

which synchronization is established

from the condition in which input / output

synchronization is lost. Calculate as

follows : HPLLN = fH-15734

HPLLP = fH-15625

min

5.8

Ratings

typ

6.0

Ratings

min

typ

-15

-15

1.2

1.6

min

2.0

Ratings

typ

40

300

500

4.7

5.0

±500

±500

Unit

max

6.2

V

Unit

max

-20

dB

-20

dB

1.9 MHz

Unit

max

μs

60

mV

700

ns

5.3

μs

Hz

Hz

No.8926-6/26

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