SI3226-X-FQ View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

SI3226-X-FQ

DUAL PROSLIC® WITH DC-DC CONTROLLER

Silicon Laboratories 

Si3226/7

Si3208/9

Table 4. AC Characteristics

(VDD = 3.13 to 3.47 V, TA = 0 to 70 °C for F-Grade, –40 to 85 °C for G-Grade)

Parameter

Test Condition

Min

Typ

Max Unit

TX/RX Performance

Overload Level

Overload Compression

Single Frequency Distortion1

2.5

—

2-Wire – PCM

Figure 6

—

2-Wire – PCM or PCM – 2-Wire:

—

—

200 Hz to 3.4 kHz

—

VPK

—

–65

dB

PCM – 2-Wire – PCM:

200 Hz – 3.4 kHz,

16-bit Linear mode

—

—

–65

dB

Signal-to-(Noise + Distortion)

Ratio2

200 Hz to 3.4 kHz

D/A or A/D 8-bit

Figure 5

—

—

Active off-hook, and OHT, any ZT

Audio Tone Generator Signal-to-

0 dBm0, Active off-hook, and

46

Distortion Ratio2

OHT, any ZT

Intermodulation Distortion

—

Gain Accuracy2

2-Wire to PCM or PCM to 2-Wire

—

—

dB

—

–41

dB

1014 Hz, Any gain setting

VDD1 – VDD4 = 3.3 V ± 5%

–0.2

—

0.2

dB

Attenuation Distortion vs. Freq.

Group Delay vs. Frequency

0 dBm 0

See AN317

Gain Tracking3

1014 Hz sine wave,

—

—

—

—

reference level –10 dBm

Signal level:

3 dB to –37 dB

—

—

0.25

dB

–37 dB to –50 dB

—

—

0.5

dB

–50 dB to –60 dB

—

—

1.0

dB

Round-Trip Group Delay

1014 Hz, Within same time-slot

—

450

500

µs

Crosstalk between channels

TX or RX to TX

TX or RX to RX

2-Wire Return Loss4

Transhybrid Balance4

0 dBm0,

300 Hz to 3.4 kHz

300 Hz to 3.4 kHz

200 Hz to 3.4 kHz

300 Hz to 3.4 kHz

—

—

–75

dB

—

—

–75

dB

26

30

—

dB

26

30

—

dB

Idle Channel Noise5

Noise Performance

C-Message weighted

—

8

12 dBrnC

Psophometric weighted

—

–80

–78 dBmP

PSRR from VDD1–VDD4

RX and TX, dc to 3.4 kHz

40

—

—

dB

Notes:

1. The input signal level should be 0 dBm0 for frequencies greater than 100 Hz. For 100 Hz and below, the level should

be –10 dBm0. The output signal magnitude at any other frequency is smaller than the maximum value specified.

2. Analog signal measured as VTIP – VRING. Assumes ideal line impedance matching.

3. The quantization errors inherent in the µ/A-law companding process can generate slightly worse gain tracking

performance in the signal range of 3 to –37 dB for signal frequencies that are integer divisors of the 8 kHz PCM

sampling rate.

4. VDD1–VDD4 = 3.3 V, VBAT = –52 V, no fuse resistors; RL = 600 Ω, ZS = 600 Ω synthesized using RS register

coefficients.

5. The level of any unwanted tones within the bandwidth of 0 to 4 kHz does not exceed –55 dBm.

6

Preliminary Rev. 0.33

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