S5L9276 View Datasheet(PDF) - Samsung

Part Name

Description

Manufacturer

S5L9276

OPTICAL CD MP3 SYSTEM

Samsung 

OPTICAL CD MP3 SYSTEM

S5L9276 (PRELIMINARY SPEC)

H_OPSR_W

H_START_M

H_START_S

H_START_F

H_ECC_EN

8'hB3

8'hB4

8'hB5

8'hB6

8'hB7

0x00: Set CDROM decoding mode to IDLE mode. CDROM decoder

discards all input bit stream and does no decoding. All registers

containing decoded header information is not valid in this mode.

0x90: Set CDROM decoding mode to MONITORING mode. Decodes

Header only.

0x91: Set CDROM decoding mode to DECODING mode. This causes

S5L9276 starts to decode the following sector and store to DRAM.

Not Used

Not Used

Not Used

Control register for ECC enable/disable.

bit7:1

not used

bit0

H : Ecc Enable

default value : 0x00

Registers to communicate with embedded DSP core

// Read only registers (8'h00  8'h0F reserved for dspUnit - Read)

H_OUT1_LOW

8'h01

Low byte of OUT1 register.

H_OUT1_HIGH

8'h02

High byte of OUT1 register.

H_OUT2_LOW

8'h03

Low byte of OUT2 register.

H_OUT2_HIGH

8'h04

High byte of OUT2 register.

H_OUT_XTRA

8'h05

Extra byte of OUT register.

H_EMPH

8'h06

Indicate Emphasis ON/OFF and Emphasis Type.

bit[7:2] : not used.

bit[1] : If "1", Emphasis ON. If "0", emphasis OFF.

bit[0] : Emphasis Type

// Write only registers (8'h80  8'h8F reserved for dspUnit - Write)

H_SSPINT

8'h80

Micom command register. Micom writes a command to this register.

H_IN_LOW

8'h81

Low byte of in register

H_IN_HIGH

8'h82

High byte of in register

H_IN_XTRA

8'h83

Extra byte of in register

21

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