SPCA711A View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

SPCA711A

DIGITAL VIDEO ENCODER FOR VIDEOCD

Unspecified 

PINOUT and DESCRIPTION

FSADJUST

5

COMP

6

VAA

7

VREFOUT

8

VREFIN

9

VBIAS 10

CVBSC 11

AGND 12

SLEEP 13

SPCA711A

29 CLKOUT

28 DATA7

27 DATA6

26 DATA5

25 DATA4

24 DATA3

23 DATA2

22 DATA1

21 DATA0

(Table 1.)

Mnemonic

DATA[7:0]

CLKOUT

VSYNC

HSYNC

MASTER

CBSWAP

PIN No.

21 - 28

29

32

1

16

15

Type

I

O

I/O

I/O

I

I

Description

YCrCb pixel inputs. They are latched on the rising edge of CLK.

YCrCb input data conform to CCIR 601.

Pixel clock output

Vertical sync input/output. VSYNC is latched/output following the rising

edge of CLK.

Horizontal sync input/output. HSYNC is latched/output following the

rising edge of CLK.

Master/slave mode selection. A logical high for master mode

operation. A logical 0 for slave mode operation.

Cr and Cb pixel sequence configuration pin. A logic high swap the

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