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STM8S103C2P6 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STM8S103C2P6 Datasheet PDF : 56 Pages
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Block diagram
3
Block diagram
Figure 1. STM8S105 access line block diagram
STM8S103xx, STM8S105xx
Reset
Reset block
Reset
POR
BOR
Clock controller
Detector
XTAL 1-16 MHz
RC int. 16 MHz
RC int. 128 kHz
Clock to peripherals and core
Single wire
debug interf.
Master/slave
autosynchro
LIN master
SPI emul.
400 Kbit/s
10 Mbit/s
STM8 CORE
Debug/SWIM
LINUART
+ extended features
I2C
SPI
Up to 10 channels
10-bit ADC
+ extended features
1/2/4 kHz
beep
Beeper
Window WDG
Independent WDG
Up to 32 Kbytes
program
Flash
Up to 2 Kbytes
RAM
Boot ROM
16-bit advanced control
timer (TIM1)
16-bit general purpose
timers (TIM2, TIM3)
8-bit basic timer
(TIM4)
AWU timer
Up to
9 CAPCOM
channels
8/56

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