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45PE80 View Datasheet(PDF) - Micron Technology

Part Name
Description
Manufacturer
45PE80
Micron
Micron Technology Micron
45PE80 Datasheet PDF : 44 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
75MHz, Serial Peripheral Interface Flash Memory
Configuration and Memory Map
Configuration and Memory Map
Memory Configuration and Block Diagram
The device is delivered with the memory array erased; all bits are set to 1 (FFh). All usa-
ble status register bits are 0. Each page of memory can be individually programmed;
bits are programmed from 1 to 0 and when written to are changed to either 0 or 1. The
device is sector and page-erasable; bits are erased from 0 to 1. The memory is config-
ured as follows:
• 1,048,576 bytes (8 bits each)
• 16 sectors (512Kb, 65KB each)
• 4,096 pages (256 bytes each)
Figure 3: Block Diagram
RESET#
W#
S#
C
DQ0
DQ1
Control Logic
Address Register
and Counter
High Voltage
Generator
I/O Shift Register
256 Byte
Data Buffer
Status
Register
FFFFFh
10000h
00000h
(Note 1)
256 bytes (page size)
X Decoder
000FFh
PDF: 09005aef845660e5
m45pe80.pdf - Rev. C 03/14 EN
Note: 1. First 256 pages can be read-only.
8
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.

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