55LD019A-45-I-BWE View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
55LD019A-45-I-BWE Datasheet PDF : 79 Pages
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ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
Data Sheet
LIST OF FIGURES
FIGURE 2-1: ATA Flash Disk Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
FIGURE 3-1: Pin Assignments for 100-lead TQFP (TQW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
FIGURE 3-2: Pin Assignments for 84-ball TFBGA (BW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
FIGURE 3-3: Pin Assignments for 85-ball VFBGA (MVW) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
FIGURE 9-1: Power-on and Brown-out Reset Timing (Commercial Temperature) . . . . . . . . . . . . . . . . . . . 18
FIGURE 9-2: Power-on and Brown-out Reset Timing (Industrial Temperature) . . . . . . . . . . . . . . . . . . . . . 18
FIGURE 12-1: AC Input/Output Reference Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
FIGURE 12-2: Host Side Interface I/O Read Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
FIGURE 12-3: Host Side Interface I/O Write Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
FIGURE 12-4: Initiating a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
FIGURE 12-5: Sustaining a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
FIGURE 12-6: Device Terminates a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
FIGURE 12-7: Host Terminates a Multi-word DMA Data Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
FIGURE 12-8: Media Command Latch Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
FIGURE 12-9: Media Address Latch Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
FIGURE 12-10: Media Data Loading Latch Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
FIGURE 12-11: Media Data Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
FIGURE 15-1: 100-lead Thin Quad Flat Pack (TQFP) SST Package Code: TQW . . . . . . . . . . . . . . . . . . . 76
FIGURE 15-2: 85-ball Very-Thin, Fine-Pitch, Ball Grid Array (VFBGA) SST Package Code: MVW . . . . . . 77
FIGURE 15-3: 84-ball Thin, Fine-pitch, Ball Grid Array (TFBGA) SST Package Code: BW . . . . . . . . . . . . 78
©2006 Silicon Storage Technology, Inc.
4
S71241-04-000
12/06
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