SAM4CP16B View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

SAM4CP16B

SMART Power Line Communications Device

Atmel Corporation 

 Debug

 Star Topology AHB-AP Debug Access Port Implementation with common SW-DP / SWJ-DP providing

higher performance than daisy-chain topology

 Debug Synchronization between both Cores (cross triggering to/from each core for Halt and Run Mode)

 I/O

 Up to 69 I/O lines with external interrupt capability (edge or level sensitivity), Schmitt Trigger, Internal Pull-

up/pull-down, Debouncing, Glitch Filtering and On-die Series Resistor Termination

 Three Parallel Input/Output Controllers

 Packages

 176-lead LQFP, 24 x 24 mm, pitch 0.5 mm

Note: 1. 120 MHz: -40/+85°C, VDDCORE = 1.2V or using internal voltage regulator.

1.1 Configuration Summary

Table 1-1 summarizes the configurations of the device family.

Table 1-1. Configuration Summary

Feature

SAM4CP16B

Flash

1024 Kbytes

SRAM

128 + 16 + 8 Kbytes

Package

LQFP 176

Number of PIOs

69

16-bit Timer

6 ch.

16-bit PWM

4 ch.

UART / USART

2/5

SPI (1)

6

TWI

2

10-bit ADC Channels(2)

7

Crypto

AES, CPKCC, ICM (SHA), TRNG

Segmented LCD

46x5

Flash Page Size

512

Flash Pages

2048

Flash Lock Region Size

8192

Flash Lock Bits

128

Notes: 1. Using SPI mode of USART.

2. One channel is reserved for internal temperature sensor, one for battery voltage measurement on VDDBU.

SAM4CP [DATASHEET]

4

43051E–ATPL–08/14

Share Link: