NT6861U View Datasheet(PDF) - Novatek Microelectronics

Part Name

Description

Manufacturer

NT6861U

8-Bit Microcontroller for Monitor

Novatek Microelectronics 

NT6861

Control bit description:

Addr. Register INIT

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

$0005 MD CON 07H

-

-

-

-

-

-

S/ C

MD1/ 2

R

-

-

-

-

INSEN

HSEL

S/ C

MD1/ 2 W

$000F

IEX

00H

-

-

IEINTS IEINTD IEINTA IEINTR IEINTE IEINTV W

$0010 IRQX 00H

-

-

IRQINTS IRQINTD IRQINTA IRQINTR IRQINTE IRQINTV R

$0011 CLR FLG 00H CLRHOV CLRVOV CLRINTS CLRINTD CLRINTA CLRINTR CLRINTE CLRINTV W

$0014 II DAT 00H SR7

SR6

SR5

SR4

SR3

SR2

SR1

SR0

RW

$0015 II STS 08H

-

-

START

STOP

RXAK

-

R

START STOP

ENDDC

TRX

TXAK W

MDCON control register:

MD1/ 2 : Select the DDC mode - '1' for DDC1 and '0' for DDC2B mode. System will be DDC1 mode by default.

When transmission mode is changed form DDC1 to DDC2B, system automatically clears this bit.

IEX control register:

At DDC1 mode, only open INTD interrupt, as well as open INTS interrupt to detect if has changed to DDC2B mode.

II_DAT control register: Data buffer for transmission.

II_STS control register:

ENDDC : When clearing this bit, system will activate DDC transmission. P30 & P31 will switch to SDA & SCL pin.

ENDDC

(in IISTS register)

Vsync Pulse

12 3 4

●

●

●

●

●

●

9 12 3 4 5 6 7 8 9 1 2

INTV

Load data in the IIDAT register to shift register

●

●

●

●

●

●

●

●

●

INTD

●

●

●

User can load next byte data to IIDAT register

SDA

Invalid data ● ● ● 8 7 6 5

● ● ● 1 Null 8

7

6

Bit

5 4 3 2 1 Null 8

Bit

7●

●

●

Shift

87

register

MSB

6543 21

First Byte Data

LSB

Second Byte Data

Figure 22. DDC1 Mode Timing Diagram

31

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