C8051F97X View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F97X

Low Power Capacitive Sensing MCU with up to 32 kB of Flash

Silicon Laboratories 

27.7.Flash Error Reset....................................................................................................... 325

27.8.Software Reset .......................................................................................................... 325

27.9.Reset Sources Control Registers............................................................................... 326

27.10.Supply Monitor Control Registers ............................................................................ 327

28. Serial Peripheral Interface (SPI0) ................................................................................... 328

28.1.Signal Descriptions .................................................................................................... 329

28.1.1.Master Out, Slave In (MOSI) ............................................................................. 329

28.1.2.Master In, Slave Out (MISO) ............................................................................. 329

28.1.3.Serial Clock (SCK)............................................................................................. 329

28.1.4.Slave Select (NSS)............................................................................................ 329

28.2.SPI0 Master Mode Operation .................................................................................... 330

28.3.SPI0 Slave Mode Operation ...................................................................................... 332

28.4.SPI0 Interrupt Sources...............................................................................................332

28.5.Serial Clock Phase and Polarity.................................................................................332

28.6.SPI Special Function Registers .................................................................................334

28.7.SPI Control Registers ................................................................................................ 338

29. System Management Bus / I2C (SMBus0) ..................................................................... 342

29.1.Supporting Documents .............................................................................................. 343

29.2.SMBus Configuration ................................................................................................. 343

29.3.SMBus Operation....................................................................................................... 343

29.3.1.Transmitter vs. Receiver.................................................................................... 344

29.3.2.Arbitration .......................................................................................................... 344

29.3.3.Clock Low Extension ......................................................................................... 344

29.3.4.SCL Low Timeout .............................................................................................. 344

29.3.5.SCL High (SMBus Free) Timeout...................................................................... 345

29.4.Using the SMBus ....................................................................................................... 345

29.4.1.SMBus Configuration Register ..........................................................................345

29.4.2.SMBus Pin Swap...............................................................................................347

29.4.3.SMBus Timing Control....................................................................................... 347

29.4.4.SMB0CN Control Register.................................................................................347

29.4.5.Hardware Slave Address Recognition............................................................... 349

29.4.6.Data Register..................................................................................................... 349

29.5.SMBus Transfer Modes ............................................................................................. 350

29.5.1.Write Sequence (Master)................................................................................... 350

29.5.2.Read Sequence (Master) .................................................................................. 351

29.5.3.Write Sequence (Slave)..................................................................................... 352

29.5.4.Read Sequence (Slave) .................................................................................... 353

29.6.SMBus Status Decoding ............................................................................................ 353

29.7.I2C / SMBus Control Registers .................................................................................. 358

30. I2C Slave ...........................................................................................................................364

30.1.Supporting Documents .............................................................................................. 365

30.2.The I2C Configuration................................................................................................ 365

30.3.I2CSLAVE0 Operation ...............................................................................................365

30.3.1.Transmitter vs. Receiver.................................................................................... 366

30.3.2.Clock Stretching ................................................................................................ 366

30.3.3.SCL Low Timeout .............................................................................................. 367

7

Rev 1.1

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