TEA5767 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

TEA5767

Low-power FM stereo radio for handheld applications

NXP Semiconductors. 

NXP Semiconductors

TEA5767HN

Low-power FM stereo radio for handheld applications

A positive edge at pin WRITE/READ enables the data transfer into the IC. The data has to

be stable at the positive edge of the clock. Data may change while the clock is LOW and is

written into the IC on the positive edge of the clock. Data transfer can be stopped after the

transmission of new tuning information with the first two bytes or after each following byte.

A negative edge at pin WRITE/READ enables the data transfer from the IC. The

WRITE/READ pin changes while the clock is LOW. With the negative edge at

pin WRITE/READ the MSB of the first byte occurs at pin DATA.

The bits are shifted on the negative clock edge to pin DATA and can be read on the

positive edge.

To do two consecutive read or write actions, pin WRITE/READ has to be toggled for at

least one clock period. When a search tuning request is sent, the IC autonomously starts

searching the FM band; the search direction and search stop level can be selected. When

a station with a field strength equal to or greater than the stop level is found, the tuning

system stops and the ready flag bit is set to HIGH. When, during search, a band limit is

reached, the tuning system stops at the band limit and the band limit flag bit is set to

HIGH. The ready flag is also set to HIGH in this case.

The software programmable output (SWPORT1) can be programmed to operate as a

tuning indicator output. As long as the IC has not completed a tuning action,

pin SWPORT1 remains LOW. The pin becomes HIGH, when a preset or search tuning is

completed or when a band limit is reached.

The reference frequency divider of the synthesizer PLL is changed when the MSB in

byte 5 is set to logic 1. The tuning system can then be clocked via pin XTAL2 at 6.5 MHz.

8.3.2 Power-on reset

At Power-on reset the mute is set, all other bits are random. To initialize the IC all bytes

have to be transferred.

8.4 Writing data

WRITE_READ

CLOCK

DATA

50 %

tW(write)

tsu(clk)

50 %

50 %

tsu(write)

th(write)

50 %

valid data

Fig 7. 3-wire bus write data

mhc250

TEA5767HN_5

Product data sheet

Rev. 05 — 26 January 2007

© NXP B.V. 2007. All rights reserved.

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